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Commit ba4f01a3 authored by Yuanhan Liu's avatar Yuanhan Liu Committed by Chris Wilson
Browse files

drm/i915: trace down all the register write and read 



Add two tracepoints at I915_WRITE/READ for tracing down all the
register write and read.

Signed-off-by: default avatarYuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 67e92af0

drivers/gpu/drm/i915/i915_drv.h

+53 −8
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ 


#include "i915_reg.h"

#include "intel_bios.h"

#include "i915_trace.h"

#include "intel_ringbuffer.h"

#include <linux/io-mapping.h>

#include <linux/i2c.h>
@@ -1173,14 +1174,58 @@ extern void intel_overlay_print_error_state(struct seq_file *m, struct intel_ove 
		LOCK_TEST_WITH_RETURN(dev, file_priv);			\

} while (0)



#define I915_READ(reg)          readl(dev_priv->regs + (reg))

#define I915_WRITE(reg, val)     writel(val, dev_priv->regs + (reg))

#define I915_READ16(reg)	readw(dev_priv->regs + (reg))

#define I915_WRITE16(reg, val)	writel(val, dev_priv->regs + (reg))

#define I915_READ8(reg)		readb(dev_priv->regs + (reg))

#define I915_WRITE8(reg, val)	writeb(val, dev_priv->regs + (reg))

#define I915_WRITE64(reg, val)	writeq(val, dev_priv->regs + (reg))

#define I915_READ64(reg)	readq(dev_priv->regs + (reg))

static inline u32 i915_read(struct drm_i915_private *dev_priv, u32 reg, int len)

{

       u64 val = 0;



       switch (len) {

       case 8:

               val = readq(dev_priv->regs + reg);

               break;

       case 4:

               val = readl(dev_priv->regs + reg);

               break;

       case 2:

               val = readw(dev_priv->regs + reg);

               break;

       case 1:

               val = readb(dev_priv->regs + reg);

               break;

       }

       trace_i915_reg_rw('R', reg, val, len);



       return val;

}



static inline void

i915_write(struct drm_i915_private *dev_priv, u32 reg, u64 val, int len)

{

       /* Trace down the write operation before the real write */

       trace_i915_reg_rw('W', reg, val, len);

       switch (len) {

       case 8:

               writeq(val, dev_priv->regs + reg);

               break;

       case 4:

               writel(val, dev_priv->regs + reg);

               break;

       case 2:

               writew(val, dev_priv->regs + reg);

               break;

       case 1:

               writeb(val, dev_priv->regs + reg);

               break;

       }

}



#define I915_READ(reg)		i915_read(dev_priv, (reg), 4)

#define I915_WRITE(reg, val)	i915_write(dev_priv, (reg), (val), 4)

#define I915_READ16(reg)	i915_read(dev_priv, (reg), 2)

#define I915_WRITE16(reg, val)	i915_write(dev_priv, (reg), (val), 2)

#define I915_READ8(reg)		i915_read(dev_priv, (reg), 1)

#define I915_WRITE8(reg, val)	i915_write(dev_priv, (reg), (val), 1)

#define I915_WRITE64(reg, val)	i915_write(dev_priv, (reg), (val), 8)

#define I915_READ64(reg)	i915_read(dev_priv, (reg), 8)

#define POSTING_READ(reg)	(void)I915_READ(reg)

#define POSTING_READ16(reg)	(void)I915_READ16(reg)

drivers/gpu/drm/i915/i915_trace.h

+23 −0
Original line number Diff line number Diff line
@@ -301,6 +301,29 @@ TRACE_EVENT(i915_flip_complete, 
	    TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj)

);



TRACE_EVENT(i915_reg_rw,

           TP_PROTO(int cmd, uint32_t reg, uint64_t val, int len),



           TP_ARGS(cmd, reg, val, len),



           TP_STRUCT__entry(

                   __field(int, cmd)

                   __field(uint32_t, reg)

                   __field(uint64_t, val)

                   __field(int, len)

                   ),



           TP_fast_assign(

                   __entry->cmd = cmd;

                   __entry->reg = reg;

                   __entry->val = (uint64_t)val;

                   __entry->len = len;

                   ),



           TP_printk("cmd=%c, reg=0x%x, val=0x%llx, len=%d",

                     __entry->cmd, __entry->reg, __entry->val, __entry->len)

);



#endif /* _I915_TRACE_H_ */



/* This part must be outside protection */