Loading drivers/tty/serial/msm_geni_serial.c +8 −0 Original line number Original line Diff line number Diff line Loading @@ -172,6 +172,7 @@ struct msm_geni_serial_port { bool manual_flow; bool manual_flow; struct msm_geni_serial_ver_info ver_info; struct msm_geni_serial_ver_info ver_info; u32 cur_tx_remaining; u32 cur_tx_remaining; bool startup_in_progress; }; }; static const struct uart_ops msm_geni_serial_pops; static const struct uart_ops msm_geni_serial_pops; Loading Loading @@ -1082,6 +1083,9 @@ static void start_rx_sequencer(struct uart_port *uport) int ret; int ret; u32 geni_se_param = UART_PARAM_RFR_OPEN; u32 geni_se_param = UART_PARAM_RFR_OPEN; if (port->startup_in_progress) return; geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); if (geni_status & S_GENI_CMD_ACTIVE) { if (geni_status & S_GENI_CMD_ACTIVE) { if (port->xfer_mode == SE_DMA && !port->rx_dma) { if (port->xfer_mode == SE_DMA && !port->rx_dma) { Loading Loading @@ -1851,6 +1855,8 @@ static int msm_geni_serial_startup(struct uart_port *uport) scnprintf(msm_port->name, sizeof(msm_port->name), "msm_serial_geni%d", scnprintf(msm_port->name, sizeof(msm_port->name), "msm_serial_geni%d", uport->line); uport->line); msm_port->startup_in_progress = true; if (likely(!uart_console(uport))) { if (likely(!uart_console(uport))) { ret = msm_geni_serial_power_on(&msm_port->uport); ret = msm_geni_serial_power_on(&msm_port->uport); if (ret) { if (ret) { Loading Loading @@ -1900,6 +1906,8 @@ static int msm_geni_serial_startup(struct uart_port *uport) exit_startup: exit_startup: if (likely(!uart_console(uport))) if (likely(!uart_console(uport))) msm_geni_serial_power_off(&msm_port->uport); msm_geni_serial_power_off(&msm_port->uport); msm_port->startup_in_progress = false; return ret; return ret; } } Loading Loading
drivers/tty/serial/msm_geni_serial.c +8 −0 Original line number Original line Diff line number Diff line Loading @@ -172,6 +172,7 @@ struct msm_geni_serial_port { bool manual_flow; bool manual_flow; struct msm_geni_serial_ver_info ver_info; struct msm_geni_serial_ver_info ver_info; u32 cur_tx_remaining; u32 cur_tx_remaining; bool startup_in_progress; }; }; static const struct uart_ops msm_geni_serial_pops; static const struct uart_ops msm_geni_serial_pops; Loading Loading @@ -1082,6 +1083,9 @@ static void start_rx_sequencer(struct uart_port *uport) int ret; int ret; u32 geni_se_param = UART_PARAM_RFR_OPEN; u32 geni_se_param = UART_PARAM_RFR_OPEN; if (port->startup_in_progress) return; geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); if (geni_status & S_GENI_CMD_ACTIVE) { if (geni_status & S_GENI_CMD_ACTIVE) { if (port->xfer_mode == SE_DMA && !port->rx_dma) { if (port->xfer_mode == SE_DMA && !port->rx_dma) { Loading Loading @@ -1851,6 +1855,8 @@ static int msm_geni_serial_startup(struct uart_port *uport) scnprintf(msm_port->name, sizeof(msm_port->name), "msm_serial_geni%d", scnprintf(msm_port->name, sizeof(msm_port->name), "msm_serial_geni%d", uport->line); uport->line); msm_port->startup_in_progress = true; if (likely(!uart_console(uport))) { if (likely(!uart_console(uport))) { ret = msm_geni_serial_power_on(&msm_port->uport); ret = msm_geni_serial_power_on(&msm_port->uport); if (ret) { if (ret) { Loading Loading @@ -1900,6 +1906,8 @@ static int msm_geni_serial_startup(struct uart_port *uport) exit_startup: exit_startup: if (likely(!uart_console(uport))) if (likely(!uart_console(uport))) msm_geni_serial_power_off(&msm_port->uport); msm_geni_serial_power_off(&msm_port->uport); msm_port->startup_in_progress = false; return ret; return ret; } } Loading