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Commit b97277cc authored by Sara Sharon's avatar Sara Sharon Committed by Luca Coelho
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iwlwifi: pcie: support new TX command 



Move to use the correct structure.
Remove code referring to old command.
Update DMA locations.

Signed-off-by: default avatarSara Sharon <sara.sharon@intel.com>
Signed-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
parent 066fd29a

drivers/net/wireless/intel/iwlwifi/pcie/internal.h

+2 −2
Original line number Diff line number Diff line
@@ -205,11 +205,11 @@ struct iwl_cmd_meta { 
 * into the buffer regardless of whether it should be mapped or not.

 * This indicates how big the first TB must be to include the scratch buffer

 * and the assigned PN.

 * Since PN location is 16 bytes at offset 24, it's 40 now.

 * Since PN location is 8 bytes at offset 12, it's 20 now.

 * If we make it bigger then allocations will be bigger and copy slower, so

 * that's probably not useful.

 */

#define IWL_FIRST_TB_SIZE	40

#define IWL_FIRST_TB_SIZE	20

#define IWL_FIRST_TB_SIZE_ALIGN ALIGN(IWL_FIRST_TB_SIZE, 64)



struct iwl_pcie_txq_entry {

drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c

+1 −9
Original line number Diff line number Diff line
@@ -284,14 +284,12 @@ static int iwl_fill_data_tbs(struct iwl_trans *trans, struct sk_buff *skb, 
	return 0;

}



#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(TX_CMD_FLG_MH_PAD)



int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb,

			   struct iwl_device_cmd *dev_cmd, int txq_id)

{

	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);

	struct ieee80211_hdr *hdr;

	struct iwl_tx_cmd *tx_cmd = (struct iwl_tx_cmd *)dev_cmd->payload;

	struct iwl_tx_cmd_gen2 *tx_cmd = (void *)dev_cmd->payload;

	struct iwl_cmd_meta *out_meta;

	struct iwl_txq *txq;

	dma_addr_t tb0_phys, tb1_phys, scratch_phys;
@@ -345,9 +343,6 @@ int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb, 
	scratch_phys = tb0_phys + sizeof(struct iwl_cmd_header) +

		       offsetof(struct iwl_tx_cmd, scratch);



	tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);

	tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);



	/* Set up first empty entry in queue's array of Tx/cmd buffers */

	out_meta = &txq->entries[txq->write_ptr].meta;

	out_meta->flags = 0;
@@ -361,9 +356,6 @@ int iwl_trans_pcie_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb, 
	len = sizeof(struct iwl_tx_cmd) + sizeof(struct iwl_cmd_header) +

	      hdr_len - IWL_FIRST_TB_SIZE;

	tb1_len = ALIGN(len, 4);

	/* Tell NIC about any 2-byte padding after MAC header */

	if (tb1_len != len)

		tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;



	/*

	 * The first TB points to bi-directional DMA data, we'll