Merge "drm/msm/sde: cleanup hw format caps" (b8d8603a) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/gpu/drm/msm/Makefile

+0 −1

Original line number	Diff line number	Diff line
		@@ -174,7 +174,6 @@ msm_drm-$(CONFIG_DRM_MSM_SDE) += \
		sde/sde_hw_util.o \
		sde/sde_hw_sspp.o \
		sde/sde_hw_wb.o \
		sde/sde_hw_rot.o \
		sde/sde_hw_pingpong.o \
		sde/sde_hw_top.o \
		sde/sde_hw_interrupts.o \

drivers/gpu/drm/msm/msm_drv.h

+0 −6

Original line number	Diff line number	Diff line
		@@ -95,7 +95,6 @@ enum msm_mdp_plane_property {
		PLANE_PROP_VIG_IGC,
		PLANE_PROP_DMA_IGC,
		PLANE_PROP_DMA_GC,
		PLANE_PROP_ROT_CAPS_V1,

		/* # of blob properties */
		PLANE_PROP_BLOBCOUNT,
		@@ -112,15 +111,10 @@ enum msm_mdp_plane_property {
		PLANE_PROP_VALUE_ADJUST,
		PLANE_PROP_CONTRAST_ADJUST,
		PLANE_PROP_EXCL_RECT_V1,
		PLANE_PROP_ROT_DST_X,
		PLANE_PROP_ROT_DST_Y,
		PLANE_PROP_ROT_DST_W,
		PLANE_PROP_ROT_DST_H,
		PLANE_PROP_PREFILL_SIZE,
		PLANE_PROP_PREFILL_TIME,
		PLANE_PROP_SCALER_V1,
		PLANE_PROP_SCALER_V2,
		PLANE_PROP_ROT_OUT_FB,
		PLANE_PROP_INVERSE_PMA,

		/* enum/bitmask properties */

drivers/gpu/drm/msm/sde/sde_crtc.c

+8 −780

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/msm/sde/sde_crtc.h

+0 −146

Original line number	Diff line number	Diff line
		@@ -25,7 +25,6 @@
		#include "sde_fence.h"
		#include "sde_kms.h"
		#include "sde_core_perf.h"
		#include "sde_hw_blk.h"
		#include "sde_hw_ds.h"

		#define SDE_CRTC_NAME_SIZE 12
		@@ -216,15 +215,9 @@ struct sde_crtc_fps_info {
		* @misr_enable : boolean entry indicates misr enable/disable status.
		* @misr_frame_count : misr frame count provided by client
		* @misr_data : store misr data before turning off the clocks.
		* @sbuf_op_mode_old : inline rotator op mode for previous commit cycle
		* @sbuf_rot_id : inline rotator block id for attached planes
		* @sbuf_rot_id_old: inline rotator id for previous commit
		* @sbuf_rot_id_delta: inline rotator id for current delta state
		* @idle_notify_work: delayed worker to notify idle timeout to user space
		* @power_event : registered power event handle
		* @cur_perf : current performance committed to clock/bandwidth driver
		* @rp_lock : serialization lock for resource pool
		* @rp_head : list of active resource pool
		* @plane_mask_old: keeps track of the planes used in the previous commit
		*/
		struct sde_crtc {
		@@ -285,10 +278,6 @@ struct sde_crtc {
		u32 misr_frame_count;
		u32 misr_data[CRTC_DUAL_MIXERS];

		u32 sbuf_op_mode_old;
		u32 sbuf_rot_id;
		u32 sbuf_rot_id_old;
		u32 sbuf_rot_id_delta;
		struct kthread_delayed_work idle_notify_work;

		struct sde_power_event *power_event;
		@@ -296,9 +285,6 @@ struct sde_crtc {
		struct sde_core_perf_params cur_perf;
		struct sde_core_perf_params new_perf;

		struct mutex rp_lock;
		struct list_head rp_head;

		u32 plane_mask_old;

		/* blob for histogram data */
		@@ -307,60 +293,6 @@ struct sde_crtc {

		#define to_sde_crtc(x) container_of(x, struct sde_crtc, base)

		/**
		* struct sde_crtc_res_ops - common operations for crtc resources
		* @get: get given resource
		* @put: put given resource
		*/
		struct sde_crtc_res_ops {
		void (get)(void *val, u32 type, u64 tag);
		void (put)(void val);
		};

		/* crtc resource type (0x0-0xffff reserved for hw block type */
		#define SDE_CRTC_RES_ROT_PLANE 0x10000
		#define SDE_CRTC_RES_ROT_IN_FB 0x10001

		#define SDE_CRTC_RES_FLAG_FREE BIT(0)

		/**
		* struct sde_crtc_res - definition of crtc resources
		* @list: list of crtc resource
		* @type: crtc resource type
		* @tag: unique identifier per type
		* @refcount: reference/usage count
		* @ops: callback operations
		* @val: resource handle associated with type/tag
		* @flags: customization flags
		*/
		struct sde_crtc_res {
		struct list_head list;
		u32 type;
		u64 tag;
		atomic_t refcount;
		struct sde_crtc_res_ops ops;
		void *val;
		u32 flags;
		};

		/**
		* sde_crtc_respool - crtc resource pool
		* @rp_lock: pointer to serialization lock
		* @rp_head: pointer to head of active resource pools of this crtc
		* @rp_list: list of crtc resource pool
		* @sequence_id: sequence identifier, incremented per state duplication
		* @res_list: list of resource managed by this resource pool
		* @ops: resource operations for parent resource pool
		*/
		struct sde_crtc_respool {
		struct mutex *rp_lock;
		struct list_head *rp_head;
		struct list_head rp_list;
		u32 sequence_id;
		struct list_head res_list;
		struct sde_crtc_res_ops ops;
		};

		/**
		* struct sde_crtc_state - sde container for atomic crtc state
		* @base: Base drm crtc state structure
		@@ -388,11 +320,6 @@ struct sde_crtc_respool {
		* @ds_cfg: Destination scaler config
		* @scl3_lut_cfg: QSEED3 lut config
		* @new_perf: new performance state being requested
		* @sbuf_cfg: stream buffer configuration
		* @sbuf_prefill_line: number of line for inline rotator prefetch
		* @sbuf_clk_rate : previous and current user specified inline rotator clock
		* @sbuf_clk_shifted : whether or not sbuf_clk_rate has been shifted as part
		* of crtc atomic check
		*/
		struct sde_crtc_state {
		struct drm_crtc_state base;
		@@ -422,12 +349,6 @@ struct sde_crtc_state {
		struct sde_hw_scaler3_lut_cfg scl3_lut_cfg;

		struct sde_core_perf_params new_perf;
		struct sde_ctl_sbuf_cfg sbuf_cfg;
		u32 sbuf_prefill_line;
		u64 sbuf_clk_rate[2];
		bool sbuf_clk_shifted;

		struct sde_crtc_respool rp;
		};

		enum sde_crtc_irq_state {
		@@ -505,19 +426,6 @@ static inline int sde_crtc_get_mixer_height(struct sde_crtc *sde_crtc,
		cstate->ds_cfg[0].lm_height : mode->vdisplay);
		}

		/**
		* sde_crtc_get_rotator_op_mode - get the rotator op mode from the crtc state
		* @crtc: Pointer to drm crtc object
		*/
		static inline enum sde_ctl_rot_op_mode sde_crtc_get_rotator_op_mode(
		struct drm_crtc *crtc)
		{
		if (!crtc \|\| !crtc->state)
		return SDE_CTL_ROT_OP_MODE_OFFLINE;

		return to_sde_crtc_state(crtc->state)->sbuf_cfg.rot_op_mode;
		}

		/**
		* sde_crtc_frame_pending - retun the number of pending frames
		* @crtc: Pointer to drm crtc object
		@@ -629,23 +537,6 @@ static inline bool sde_crtc_is_enabled(struct drm_crtc *crtc)
		return crtc ? crtc->enabled : false;
		}

		/**
		* sde_crtc_get_inline_prefill - get current inline rotation prefill
		* @crtc: Pointer to crtc
		* return: number of prefill lines
		*/
		static inline u32 sde_crtc_get_inline_prefill(struct drm_crtc *crtc)
		{
		struct sde_crtc_state *cstate;

		if (!crtc \|\| !crtc->state)
		return 0;

		cstate = to_sde_crtc_state(crtc->state);
		return cstate->sbuf_cfg.rot_op_mode != SDE_CTL_ROT_OP_MODE_OFFLINE ?
		cstate->sbuf_prefill_line : 0;
		}

		/**
		* sde_crtc_is_reset_required - validate the reset request based on the
		* pm_suspend and crtc's active status. crtc's are left active
		@@ -682,36 +573,6 @@ int sde_crtc_event_queue(struct drm_crtc *crtc,
		void (func)(struct drm_crtc crtc, void *usr),
		void *usr, bool color_processing_event);

		/**
		* sde_crtc_res_add - add given resource to resource pool in crtc state
		* @state: Pointer to drm crtc state
		* @type: Resource type
		* @tag: Search tag for given resource
		* @val: Resource handle
		* @ops: Resource callback operations
		* return: 0 if success; error code otherwise
		*/
		int sde_crtc_res_add(struct drm_crtc_state *state, u32 type, u64 tag,
		void val, struct sde_crtc_res_ops ops);

		/**
		* sde_crtc_res_get - get given resource from resource pool in crtc state
		* @state: Pointer to drm crtc state
		* @type: Resource type
		* @tag: Search tag for given resource
		* return: Resource handle if success; pointer error or null otherwise
		*/
		void sde_crtc_res_get(struct drm_crtc_state state, u32 type, u64 tag);

		/**
		* sde_crtc_res_put - return given resource to resource pool in crtc state
		* @state: Pointer to drm crtc state
		* @type: Resource type
		* @tag: Search tag for given resource
		* return: None
		*/
		void sde_crtc_res_put(struct drm_crtc_state *state, u32 type, u64 tag);

		/**
		* sde_crtc_get_crtc_roi - retrieve the crtc_roi from the given state object
		* used to allow the planes to adjust their final lm out_xy value in the
		@@ -813,13 +674,6 @@ void sde_crtc_timeline_status(struct drm_crtc *crtc);
		void sde_crtc_update_cont_splash_settings(
		struct drm_crtc *crtc);

		/**
		* sde_crtc_get_sbuf_clk - get user specified sbuf clock settings
		* @state: Pointer to DRM crtc state object
		* Returns: Filtered sbuf clock setting from user space
		*/
		uint64_t sde_crtc_get_sbuf_clk(struct drm_crtc_state *state);

		/**
		* sde_crtc_misr_setup - to configure and enable/disable MISR
		* @crtc: Pointer to drm crtc structure

drivers/gpu/drm/msm/sde/sde_encoder.c

+8 −46

Original line number	Diff line number	Diff line
		@@ -1763,8 +1763,7 @@ static int _sde_encoder_switch_to_watchdog_vsync(struct drm_encoder *drm_enc)
		}

		static int _sde_encoder_update_rsc_client(
		struct drm_encoder *drm_enc,
		struct sde_encoder_rsc_config *config, bool enable)
		struct drm_encoder *drm_enc, bool enable)
		{
		struct sde_encoder_virt *sde_enc;
		struct drm_crtc *crtc;
		@@ -1836,8 +1835,7 @@ static int _sde_encoder_update_rsc_client(

		SDE_EVT32(rsc_state, qsync_mode);

		prefill_lines = config ? mode_info.prefill_lines +
		config->inline_rotate_prefill : mode_info.prefill_lines;
		prefill_lines = mode_info.prefill_lines;

		/* compare specific items and reconfigure the rsc */
		if ((rsc_config->fps != mode_info.frame_rate) \|\|
		@@ -2014,32 +2012,6 @@ struct sde_rsc_client sde_encoder_get_rsc_client(struct drm_encoder drm_enc)
		return sde_enc->rsc_client;
		}

		static void _sde_encoder_resource_control_rsc_update(
		struct drm_encoder *drm_enc, bool enable)
		{
		struct sde_encoder_rsc_config rsc_cfg = { 0 };
		struct sde_encoder_virt *sde_enc;

		if (!drm_enc) {
		SDE_ERROR("invalid encoder argument\n");
		return;
		}
		sde_enc = to_sde_encoder_virt(drm_enc);
		if (!sde_enc->crtc) {
		SDE_ERROR("invalid crtc\n");
		return;
		}

		if (enable) {
		rsc_cfg.inline_rotate_prefill =
		sde_crtc_get_inline_prefill(sde_enc->crtc);

		_sde_encoder_update_rsc_client(drm_enc, &rsc_cfg, true);
		} else {
		_sde_encoder_update_rsc_client(drm_enc, NULL, false);
		}
		}

		static int _sde_encoder_resource_control_helper(struct drm_encoder *drm_enc,
		bool enable)
		{
		@@ -2251,7 +2223,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		return ret;
		}

		_sde_encoder_resource_control_rsc_update(drm_enc, true);
		_sde_encoder_update_rsc_client(drm_enc, true);
		}

		SDE_EVT32(DRMID(drm_enc), sw_event, sde_enc->rc_state,
		@@ -2358,7 +2330,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		* IRQs are still enabled currently, which allows wait for
		* VBLANK which RSC may require to correctly transition to OFF
		*/
		_sde_encoder_resource_control_rsc_update(drm_enc, false);
		_sde_encoder_update_rsc_client(drm_enc, false);

		SDE_EVT32(DRMID(drm_enc), sw_event, sde_enc->rc_state,
		SDE_ENC_RC_STATE_PRE_OFF,
		@@ -2434,7 +2406,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		return ret;
		}

		_sde_encoder_resource_control_rsc_update(drm_enc, true);
		_sde_encoder_update_rsc_client(drm_enc, true);

		SDE_EVT32(DRMID(drm_enc), sw_event, sde_enc->rc_state,
		SDE_ENC_RC_STATE_ON, SDE_EVTLOG_FUNC_CASE5);
		@@ -2479,7 +2451,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		_sde_encoder_modeset_helper_locked(drm_enc, sw_event);
		_sde_encoder_irq_control(drm_enc, true);

		_sde_encoder_update_rsc_client(drm_enc, NULL, true);
		_sde_encoder_update_rsc_client(drm_enc, true);

		SDE_EVT32(DRMID(drm_enc), sw_event, sde_enc->rc_state,
		SDE_ENC_RC_STATE_ON, SDE_EVTLOG_FUNC_CASE6);
		@@ -2519,8 +2491,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		_sde_encoder_irq_control(drm_enc, false);
		} else {
		/* disable all the clks and resources */
		_sde_encoder_resource_control_rsc_update(drm_enc,
		false);
		_sde_encoder_update_rsc_client(drm_enc, false);
		_sde_encoder_resource_control_helper(drm_enc, false);
		}

		@@ -2578,7 +2549,7 @@ static int sde_encoder_resource_control(struct drm_encoder *drm_enc,
		return ret;
		}

		_sde_encoder_resource_control_rsc_update(drm_enc, true);
		_sde_encoder_update_rsc_client(drm_enc, true);

		/*
		* In some cases, commit comes with slight delay
		@@ -3569,15 +3540,6 @@ static inline void _sde_encoder_trigger_start(struct sde_encoder_phys *phys)
		return;
		}

		/* Start rotator before CTL_START for async inline mode */
		if (sde_crtc_get_rotator_op_mode(sde_enc->crtc) ==
		SDE_CTL_ROT_OP_MODE_INLINE_ASYNC &&
		ctl->ops.trigger_rot_start) {
		SDE_DEBUG_ENC(sde_enc, "trigger rotator start ctl%d\n",
		ctl->idx - CTL_0);
		ctl->ops.trigger_rot_start(ctl);
		}

		if (phys->ops.trigger_start && phys->enable_state != SDE_ENC_DISABLED)
		phys->ops.trigger_start(phys);
		}