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Commit b8b16d99 authored by Yuan Zhao's avatar Yuan Zhao Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: set qupv3 se1 i2c rate to 100khz

Since it was used only for dsi-hdmi bridge chipset,
the chipset could not support higher rate, so set
it to 100khz.

Change-Id: If9a3f8ae2c89847caecb7c9dad52c0313edd3af1
parent 33440d3c
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+3 −0
Original line number Diff line number Diff line
@@ -41,6 +41,9 @@

&qupv3_se1_i2c {
	status = "ok";
	qcom,clk-freq-out = <100000>;
	#address-cells = <1>;
	#size-cells = <0>;
	lt9611: lt,lt9611@2b {
		compatible = "lt,lt9611uxc";
		reg = <0x2b>;