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Commit b7b0ba94 authored by Catalin Marinas's avatar Catalin Marinas
Browse files

RealView: Move the SCU initialisation out of __v6_setup 



This patch moves the SCU initialisation from __v6_setup to the
smp_prepare_cpus() function as it relies on platform-specific
settings. Changes to get_core_count() are mainly for allowing cleaner
code with the upcoming PB11MPCore patches.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent cb170a45

arch/arm/mach-realview/platsmp.c

+35 −8
Original line number Original line Diff line number Diff line
@@ -15,11 +15,13 @@ 
#include <linux/smp.h>

#include <linux/smp.h>





#include <asm/cacheflush.h>

#include <asm/cacheflush.h>

#include <asm/hardware/arm_scu.h>

#include <asm/hardware.h>

#include <asm/hardware.h>

#include <asm/io.h>

#include <asm/io.h>

#include <asm/mach-types.h>

#include <asm/mach-types.h>





#include <asm/arch/board-eb.h>

#include <asm/arch/scu.h>



extern void realview_secondary_startup(void);

extern void realview_secondary_startup(void);





/*

/*
@@ -31,9 +33,13 @@ volatile int __cpuinitdata pen_release = -1; 
static unsigned int __init get_core_count(void)

static unsigned int __init get_core_count(void)

{

{

	unsigned int ncores;

	unsigned int ncores;

	void __iomem *scu_base = 0;



	if (machine_is_realview_eb() && core_tile_eb11mp())

		scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);





	if (machine_is_realview_eb() && core_tile_eb11mp()) {

	if (scu_base) {

		ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG);

		ncores = __raw_readl(scu_base + SCU_CONFIG);

		ncores = (ncores & 0x03) + 1;

		ncores = (ncores & 0x03) + 1;

	} else

	} else

		ncores = 1;

		ncores = 1;
@@ -41,6 +47,24 @@ static unsigned int __init get_core_count(void) 
	return ncores;

	return ncores;

}

}





/*

 * Setup the SCU

 */

static void scu_enable(void)

{

	u32 scu_ctrl;

	void __iomem *scu_base;



	if (machine_is_realview_eb() && core_tile_eb11mp())

		scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);

	else

		BUG();



	scu_ctrl = __raw_readl(scu_base + SCU_CTRL);

	scu_ctrl |= 1;

	__raw_writel(scu_ctrl, scu_base + SCU_CTRL);

}



static DEFINE_SPINLOCK(boot_lock);

static DEFINE_SPINLOCK(boot_lock);





void __cpuinit platform_secondary_init(unsigned int cpu)

void __cpuinit platform_secondary_init(unsigned int cpu)
@@ -210,11 +234,14 @@ void __init smp_prepare_cpus(unsigned int max_cpus) 
		cpu_set(i, cpu_present_map);

		cpu_set(i, cpu_present_map);





	/*

	/*

	 * Do we need any more CPUs? If so, then let them know where

	 * Initialise the SCU if there are more than one CPU and let

	 * to start. Note that, on modern versions of MILO, the "poke"

	 * them know where to start. Note that, on modern versions of

	 * doesn't actually do anything until each individual core is

	 * MILO, the "poke" doesn't actually do anything until each

	 * sent a soft interrupt to get it out of WFI

	 * individual core is sent a soft interrupt to get it out of

	 * WFI

	 */

	 */

	if (max_cpus > 1)

	if (max_cpus > 1) {

		scu_enable();

		poke_milo();

		poke_milo();

	}

	}

}

arch/arm/mm/proc-v6.S

+0 −14
Original line number Original line Diff line number Diff line
@@ -17,10 +17,6 @@ 
#include <asm/pgtable-hwdef.h>

#include <asm/pgtable-hwdef.h>

#include <asm/pgtable.h>

#include <asm/pgtable.h>





#ifdef CONFIG_SMP

#include <asm/hardware/arm_scu.h>

#endif



#include "proc-macros.S"

#include "proc-macros.S"





#define D_CACHE_LINE_SIZE	32

#define D_CACHE_LINE_SIZE	32
@@ -187,19 +183,9 @@ cpu_v6_name: 
 */

 */

__v6_setup:

__v6_setup:

#ifdef CONFIG_SMP

#ifdef CONFIG_SMP

	/* Set up the SCU on core 0 only */

	mrc	p15, 0, r0, c0, c0, 5		@ CPU core number

	ands	r0, r0, #15

	ldreq	r0, =SCU_BASE

	ldreq	r5, [r0, #SCU_CTRL]

	orreq	r5, r5, #1

	streq	r5, [r0, #SCU_CTRL]



#ifndef CONFIG_CPU_DCACHE_DISABLE

	mrc	p15, 0, r0, c1, c0, 1		@ Enable SMP/nAMP mode

	mrc	p15, 0, r0, c1, c0, 1		@ Enable SMP/nAMP mode

	orr	r0, r0, #0x20

	orr	r0, r0, #0x20

	mcr	p15, 0, r0, c1, c0, 1

	mcr	p15, 0, r0, c1, c0, 1

#endif

#endif

#endif





	mov	r0, #0

	mov	r0, #0

include/asm-arm/arch-realview/scu.h

+8 −3
Original line number Original line Diff line number Diff line 
#ifndef __ASMARM_ARCH_SCU_H

#ifndef __ASMARM_ARCH_SCU_H

#define __ASMARM_ARCH_SCU_H

#define __ASMARM_ARCH_SCU_H





#include <asm/arch/board-eb.h>

/*



 * SCU registers

#define SCU_BASE	REALVIEW_EB11MP_SCU_BASE

 */

#define SCU_CTRL		0x00

#define SCU_CONFIG		0x04

#define SCU_CPU_STATUS		0x08

#define SCU_INVALIDATE		0x0c

#define SCU_FPGA_REVISION	0x10





#endif
 
#endif

include/asm-arm/hardware/arm_scu.h

deleted100644 → 0
+0 −15
Original line number Original line Diff line number Diff line 
#ifndef ASMARM_HARDWARE_ARM_SCU_H

#define ASMARM_HARDWARE_ARM_SCU_H



#include <asm/arch/scu.h>



/*

 * SCU registers

 */

#define SCU_CTRL		0x00

#define SCU_CONFIG		0x04

#define SCU_CPU_STATUS		0x08

#define SCU_INVALIDATE		0x0c

#define SCU_FPGA_REVISION	0x10



#endif