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Commit b7867394 authored by Olivier Galibert's avatar Olivier Galibert Committed by Andi Kleen
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[PATCH] mmconfig: Share parts of mmconfig code between i386 and x86-64 



i386 and x86-64 pci mmconfig code have a lot in common.  So share what's
shareable between the two.

Signed-off-by: default avatarOlivier Galibert <galibert@pobox.com>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
parent 2e188938

arch/i386/pci/Makefile

+1 −1
Original line number Original line Diff line number Diff line 
obj-y				:= i386.o init.o

obj-y				:= i386.o init.o





obj-$(CONFIG_PCI_BIOS)		+= pcbios.o

obj-$(CONFIG_PCI_BIOS)		+= pcbios.o

obj-$(CONFIG_PCI_MMCONFIG)	+= mmconfig.o direct.o

obj-$(CONFIG_PCI_MMCONFIG)	+= mmconfig.o direct.o mmconfig-shared.o

obj-$(CONFIG_PCI_DIRECT)	+= direct.o

obj-$(CONFIG_PCI_DIRECT)	+= direct.o





pci-y				:= fixup.o

pci-y				:= fixup.o

arch/i386/pci/mmconfig-shared.c

0 → 100644
+86 −0
Original line number Original line Diff line number Diff line 
/*

 * mmconfig-shared.c - Low-level direct PCI config space access via

 *                     MMCONFIG - common code between i386 and x86-64.

 *

 * This code does:

 * - ACPI decoding and validation

 *

 * Per-architecture code takes care of the mappings and accesses

 * themselves.

 */



#include <linux/pci.h>

#include <linux/init.h>

#include <linux/acpi.h>

#include <linux/bitmap.h>

#include <asm/e820.h>



#include "pci.h"



/* aperture is up to 256MB but BIOS may reserve less */

#define MMCONFIG_APER_MIN	(2 * 1024*1024)

#define MMCONFIG_APER_MAX	(256 * 1024*1024)



/* Verify the first 16 busses. We assume that systems with more busses

   get MCFG right. */

#define PCI_MMCFG_MAX_CHECK_BUS 16



DECLARE_BITMAP(pci_mmcfg_fallback_slots, 32*PCI_MMCFG_MAX_CHECK_BUS);



/* K8 systems have some devices (typically in the builtin northbridge)

   that are only accessible using type1

   Normally this can be expressed in the MCFG by not listing them

   and assigning suitable _SEGs, but this isn't implemented in some BIOS.

   Instead try to discover all devices on bus 0 that are unreachable using MM

   and fallback for them. */

static __init void unreachable_devices(void)

{

	int i, k;

	/* Use the max bus number from ACPI here? */

	for (k = 0; k < PCI_MMCFG_MAX_CHECK_BUS; k++) {

		for (i = 0; i < 32; i++) {

			u32 val1, val2;



			pci_conf1_read(0, k, PCI_DEVFN(i,0), 0, 4, &val1);

			if (val1 == 0xffffffff)

				continue;



			raw_pci_ops->read(0, k, PCI_DEVFN(i, 0), 0, 4, &val2);

			if (val1 != val2) {

				set_bit(i + 32*k, pci_mmcfg_fallback_slots);

				printk(KERN_NOTICE "PCI: No mmconfig possible"

				       " on device %02x:%02x\n", k, i);

			}

		}

	}

}



void __init pci_mmcfg_init(int type)

{

	if ((pci_probe & PCI_PROBE_MMCONF) == 0)

		return;



	acpi_table_parse(ACPI_SIG_MCFG, acpi_parse_mcfg);



	if ((pci_mmcfg_config_num == 0) ||

	    (pci_mmcfg_config == NULL) ||

	    (pci_mmcfg_config[0].address == 0))

		return;



	/* Only do this check when type 1 works. If it doesn't work

           assume we run on a Mac and always use MCFG */

	if (type == 1 &&

	    !e820_all_mapped(pci_mmcfg_config[0].address,

			     pci_mmcfg_config[0].address + MMCONFIG_APER_MIN,

			     E820_RESERVED)) {

		printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %Lx is not E820-reserved\n",

				pci_mmcfg_config[0].address);

		printk(KERN_ERR "PCI: Not using MMCONFIG.\n");

		return;

	}



	if (pci_mmcfg_arch_init()) {

		unreachable_devices();

		pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;

	}

}

arch/i386/pci/mmconfig.c

+4 −70
Original line number Original line Diff line number Diff line
@@ -15,21 +15,13 @@ 
#include <asm/e820.h>

#include <asm/e820.h>

#include "pci.h"

#include "pci.h"





/* aperture is up to 256MB but BIOS may reserve less */

#define MMCONFIG_APER_MIN	(2 * 1024*1024)

#define MMCONFIG_APER_MAX	(256 * 1024*1024)



/* Assume systems with more busses have correct MCFG */

/* Assume systems with more busses have correct MCFG */

#define MAX_CHECK_BUS 16



#define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))

#define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))





/* The base address of the last MMCONFIG device accessed */

/* The base address of the last MMCONFIG device accessed */

static u32 mmcfg_last_accessed_device;

static u32 mmcfg_last_accessed_device;

static int mmcfg_last_accessed_cpu;

static int mmcfg_last_accessed_cpu;





static DECLARE_BITMAP(fallback_slots, MAX_CHECK_BUS*32);



/*

/*

 * Functions for accessing PCI configuration space with MMCONFIG accesses

 * Functions for accessing PCI configuration space with MMCONFIG accesses

 */

 */
@@ -38,8 +30,8 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn) 
	int cfg_num = -1;

	int cfg_num = -1;

	struct acpi_mcfg_allocation *cfg;

	struct acpi_mcfg_allocation *cfg;





	if (seg == 0 && bus < MAX_CHECK_BUS &&

	if (seg == 0 && bus < PCI_MMCFG_MAX_CHECK_BUS &&

	    test_bit(PCI_SLOT(devfn) + 32*bus, fallback_slots))

	    test_bit(PCI_SLOT(devfn) + 32*bus, pci_mmcfg_fallback_slots))

		return 0;

		return 0;





	while (1) {

	while (1) {
@@ -158,67 +150,9 @@ static struct pci_raw_ops pci_mmcfg = { 
	.write =	pci_mmcfg_write,

	.write =	pci_mmcfg_write,

};

};





/* K8 systems have some devices (typically in the builtin northbridge)

int __init pci_mmcfg_arch_init(void)

   that are only accessible using type1

   Normally this can be expressed in the MCFG by not listing them

   and assigning suitable _SEGs, but this isn't implemented in some BIOS.

   Instead try to discover all devices on bus 0 that are unreachable using MM

   and fallback for them. */

static __init void unreachable_devices(void)

{

{

	int i, k;

	unsigned long flags;



	for (k = 0; k < MAX_CHECK_BUS; k++) {

		for (i = 0; i < 32; i++) {

			u32 val1;

			u32 addr;



			pci_conf1_read(0, k, PCI_DEVFN(i, 0), 0, 4, &val1);

			if (val1 == 0xffffffff)

				continue;



			/* Locking probably not needed, but safer */

			spin_lock_irqsave(&pci_config_lock, flags);

			addr = get_base_addr(0, k, PCI_DEVFN(i, 0));

			if (addr != 0)

				pci_exp_set_dev_base(addr, k, PCI_DEVFN(i, 0));

			if (addr == 0 ||

			    readl((u32 __iomem *)mmcfg_virt_addr) != val1) {

				set_bit(i + 32*k, fallback_slots);

				printk(KERN_NOTICE

			"PCI: No mmconfig possible on %x:%x\n", k, i);

			}

			spin_unlock_irqrestore(&pci_config_lock, flags);

		}

	}

}



void __init pci_mmcfg_init(int type)

{

	if ((pci_probe & PCI_PROBE_MMCONF) == 0)

		return;



	acpi_table_parse(ACPI_SIG_MCFG, acpi_parse_mcfg);

	if ((pci_mmcfg_config_num == 0) ||

	    (pci_mmcfg_config == NULL) ||

	    (pci_mmcfg_config[0].address == 0))

		return;



	/* Only do this check when type 1 works. If it doesn't work

	   assume we run on a Mac and always use MCFG */

	if (type == 1 && !e820_all_mapped(pci_mmcfg_config[0].address,

			pci_mmcfg_config[0].address + MMCONFIG_APER_MIN,

			E820_RESERVED)) {

		printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %lx is not E820-reserved\n",

				(unsigned long)pci_mmcfg_config[0].address);

		printk(KERN_ERR "PCI: Not using MMCONFIG.\n");

		return;

	}



	printk(KERN_INFO "PCI: Using MMCONFIG\n");

	printk(KERN_INFO "PCI: Using MMCONFIG\n");

	raw_pci_ops = &pci_mmcfg;

	raw_pci_ops = &pci_mmcfg;

	pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;

	return 1;



	unreachable_devices();

}
 
}

arch/i386/pci/pci.h

+6 −0
Original line number Original line Diff line number Diff line
@@ -94,3 +94,9 @@ extern void pci_pcbios_init(void); 
extern void pci_mmcfg_init(int type);

extern void pci_mmcfg_init(int type);

extern void pcibios_sort(void);

extern void pcibios_sort(void);





/* pci-mmconfig.c */



#define PCI_MMCFG_MAX_CHECK_BUS 16

extern DECLARE_BITMAP(pci_mmcfg_fallback_slots, 32*PCI_MMCFG_MAX_CHECK_BUS);



extern int pci_mmcfg_arch_init(void);

arch/x86_64/pci/Makefile

+2 −1
Original line number Original line Diff line number Diff line
@@ -11,7 +11,7 @@ obj-y += fixup.o init.o 
obj-$(CONFIG_ACPI)	+= acpi.o

obj-$(CONFIG_ACPI)	+= acpi.o

obj-y			+= legacy.o irq.o common.o early.o

obj-y			+= legacy.o irq.o common.o early.o

# mmconfig has a 64bit special

# mmconfig has a 64bit special

obj-$(CONFIG_PCI_MMCONFIG) += mmconfig.o direct.o

obj-$(CONFIG_PCI_MMCONFIG) += mmconfig.o direct.o mmconfig-shared.o





obj-$(CONFIG_NUMA)	+= k8-bus.o

obj-$(CONFIG_NUMA)	+= k8-bus.o
@@ -24,3 +24,4 @@ fixup-y += ../../i386/pci/fixup.o 
i386-y  += ../../i386/pci/i386.o

i386-y  += ../../i386/pci/i386.o

init-y += ../../i386/pci/init.o

init-y += ../../i386/pci/init.o

early-y += ../../i386/pci/early.o

early-y += ../../i386/pci/early.o

mmconfig-shared-y += ../../i386/pci/mmconfig-shared.o