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Commit b760b7e1 authored by Swathi Sridhar's avatar Swathi Sridhar
Browse files

ARM: dts: msm: Update bus votes for apps smmu tbus and tcu on Kona 



Update bus votes for apps smmu tbus and tcu to vote for the
clocks controlled by rpmh on Kona.

Change-Id: I1bde881c2de9428ec5f9ff95c2f74b9caf276372
Signed-off-by: default avatarSwathi Sridhar <swatsrid@codeaurora.org>
parent 4c1a5c14

arch/arm64/boot/dts/qcom/msm-arm-smmu-kona.dtsi

+125 −0
Original line number Diff line number Diff line
@@ -167,6 +167,17 @@ 
				<GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>;

		qcom,msm-bus,name = "apps_smmu";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,active-only;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<MSM_BUS_MASTER_GEM_NOC_SNOC>,

			<MSM_BUS_SLAVE_IMEM_CFG>,

			<0 0>,

			<MSM_BUS_MASTER_GEM_NOC_SNOC>,

			<MSM_BUS_SLAVE_IMEM_CFG>,

			<0 1000>;



		anoc_1_tbu: anoc_1_tbu@15185000 {

			compatible = "qcom,qsmmuv500-tbu";
@@ -174,6 +185,17 @@ 
				<0x15182200 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x0 0x400>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 0>,

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 1000>;

		};



		anoc_2_tbu: anoc_2_tbu@15189000 {
@@ -182,6 +204,17 @@ 
				<0x15182208 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x400 0x400>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 0>,

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 1000>;

		};



		mnoc_hf_0_tbu: mnoc_hf_0_tbu@1518d000 {
@@ -192,6 +225,17 @@ 
			qcom,stream-id-range = <0x800 0x400>;

			qcom,regulator-names = "vdd";

			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>;

			qcom,msm-bus,name = "mnoc_hf_0_tbu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_MDP_PORT0>,

				<MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_MDP_PORT0>,

				<MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>,

				<0 1000>;

		};



		mnoc_hf_1_tbu: mnoc_hf_1_tbu@15191000 {
@@ -202,6 +246,17 @@ 
			qcom,stream-id-range = <0xc00 0x400>;

			qcom,regulator-names = "vdd";

			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc>;

			qcom,msm-bus,name = "mnoc_hf_1_tbu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_MDP_PORT0>,

				<MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_MDP_PORT0>,

				<MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>,

				<0 1000>;

		};



		compute_dsp_1_tbu: compute_dsp_1_tbu@15195000 {
@@ -210,6 +265,17 @@ 
				<0x15182220 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x1000 0x400>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_NPU>,

				<MSM_BUS_SLAVE_CDSP_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_NPU>,

				<MSM_BUS_SLAVE_CDSP_MEM_NOC>,

				<0 1000>;

		};



		compute_dsp_0_tbu: compute_dsp_0_tbu@15199000 {
@@ -218,6 +284,18 @@ 
				<0x15182228 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x1400 0x400>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_NPU>,

				<MSM_BUS_SLAVE_CDSP_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_NPU>,

				<MSM_BUS_SLAVE_CDSP_MEM_NOC>,

				<0 1000>;



		};



		adsp_tbu: adsp_tbu@1519d000 {
@@ -226,6 +304,17 @@ 
				<0x15182230 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x1800 0x400>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 0>,

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 1000>;

		};



		anoc_1_pcie_tbu: anoc_1_pcie_tbu@151a1000 {
@@ -234,6 +323,20 @@ 
				<0x15182238 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x1c00 0x400>;

			clock-names = "gcc_aggre_noc_pcie_tbu_clk";

			clocks = <&clock_gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 0>,

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 1000>;



		};



		mnoc_sf_0_tbu: mnoc_sf_0_tbu@151a5000 {
@@ -244,6 +347,17 @@ 
			qcom,stream-id-range = <0x2000 0x400>;

			qcom,regulator-names = "vdd";

			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc>;

			qcom,msm-bus,name = "mnoc_sf_0_tbu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_CAMNOC_SF>,

				<MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_CAMNOC_SF>,

				<MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>,

				<0 1000>;

		};



		mnoc_sf_1_tbu: mnoc_sf_1_tbu@151a9000 {
@@ -254,6 +368,17 @@ 
			qcom,stream-id-range = <0x2400 0x400>;

			qcom,regulator-names = "vdd";

			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc>;

			qcom,msm-bus,name = "mnoc_sf_1_tbu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_CAMNOC_SF>,

				<MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_CAMNOC_SF>,

				<MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>,

				<0 1000>;

		};

	};