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Commit b7268c5e authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Pack params to engine->schedule() into a struct 



Today we only want to pass along the priority to engine->schedule(), but
in the future we want to have much more control over the various aspects
of the GPU during a context's execution, for example controlling the
frequency allowed. As we need an ever growing number of parameters for
scheduling, move those into a struct for convenience.

v2: Move the anonymous struct into its own function for legibility and
ye olde gcc.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180418184052.7129-3-chris@chris-wilson.co.uk
parent 0c7112a0

drivers/gpu/drm/i915/gvt/scheduler.c

+1 −1
Original line number Diff line number Diff line
@@ -1135,7 +1135,7 @@ int intel_vgpu_setup_submission(struct intel_vgpu *vgpu) 
		return PTR_ERR(s->shadow_ctx);



	if (HAS_LOGICAL_RING_PREEMPTION(vgpu->gvt->dev_priv))

		s->shadow_ctx->priority = INT_MAX;

		s->shadow_ctx->sched.priority = INT_MAX;



	bitmap_zero(s->shadow_ctx_desc_updated, I915_NUM_ENGINES);

drivers/gpu/drm/i915/i915_drv.h

+2 −1
Original line number Diff line number Diff line
@@ -75,6 +75,7 @@ 
#include "i915_gem_timeline.h"

#include "i915_gpu_error.h"

#include "i915_request.h"

#include "i915_scheduler.h"

#include "i915_vma.h"



#include "intel_gvt.h"
@@ -3158,7 +3159,7 @@ int i915_gem_object_wait(struct drm_i915_gem_object *obj, 
			 struct intel_rps_client *rps);

int i915_gem_object_wait_priority(struct drm_i915_gem_object *obj,

				  unsigned int flags,

				  int priority);

				  const struct i915_sched_attr *attr);

#define I915_PRIORITY_DISPLAY I915_PRIORITY_MAX



int __must_check

drivers/gpu/drm/i915/i915_gem.c

+10 −8
Original line number Diff line number Diff line
@@ -564,7 +564,8 @@ i915_gem_object_wait_reservation(struct reservation_object *resv, 
	return timeout;

}



static void __fence_set_priority(struct dma_fence *fence, int prio)

static void __fence_set_priority(struct dma_fence *fence,

				 const struct i915_sched_attr *attr)

{

	struct i915_request *rq;

	struct intel_engine_cs *engine;
@@ -577,11 +578,12 @@ static void __fence_set_priority(struct dma_fence *fence, int prio) 


	rcu_read_lock();

	if (engine->schedule)

		engine->schedule(rq, prio);

		engine->schedule(rq, attr);

	rcu_read_unlock();

}



static void fence_set_priority(struct dma_fence *fence, int prio)

static void fence_set_priority(struct dma_fence *fence,

			       const struct i915_sched_attr *attr)

{

	/* Recurse once into a fence-array */

	if (dma_fence_is_array(fence)) {
@@ -589,16 +591,16 @@ static void fence_set_priority(struct dma_fence *fence, int prio) 
		int i;



		for (i = 0; i < array->num_fences; i++)

			__fence_set_priority(array->fences[i], prio);

			__fence_set_priority(array->fences[i], attr);

	} else {

		__fence_set_priority(fence, prio);

		__fence_set_priority(fence, attr);

	}

}



int

i915_gem_object_wait_priority(struct drm_i915_gem_object *obj,

			      unsigned int flags,

			      int prio)

			      const struct i915_sched_attr *attr)

{

	struct dma_fence *excl;
@@ -613,7 +615,7 @@ i915_gem_object_wait_priority(struct drm_i915_gem_object *obj, 
			return ret;



		for (i = 0; i < count; i++) {

			fence_set_priority(shared[i], prio);

			fence_set_priority(shared[i], attr);

			dma_fence_put(shared[i]);

		}
@@ -623,7 +625,7 @@ i915_gem_object_wait_priority(struct drm_i915_gem_object *obj, 
	}



	if (excl) {

		fence_set_priority(excl, prio);

		fence_set_priority(excl, attr);

		dma_fence_put(excl);

	}

	return 0;

drivers/gpu/drm/i915/i915_gem_context.c

+4 −4
Original line number Diff line number Diff line
@@ -281,7 +281,7 @@ __create_hw_context(struct drm_i915_private *dev_priv, 
	kref_init(&ctx->ref);

	list_add_tail(&ctx->link, &dev_priv->contexts.list);

	ctx->i915 = dev_priv;

	ctx->priority = I915_PRIORITY_NORMAL;

	ctx->sched.priority = I915_PRIORITY_NORMAL;



	INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);

	INIT_LIST_HEAD(&ctx->handles_list);
@@ -431,7 +431,7 @@ i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio) 
		return ctx;



	i915_gem_context_clear_bannable(ctx);

	ctx->priority = prio;

	ctx->sched.priority = prio;

	ctx->ring_size = PAGE_SIZE;



	GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
@@ -753,7 +753,7 @@ int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data, 
		args->value = i915_gem_context_is_bannable(ctx);

		break;

	case I915_CONTEXT_PARAM_PRIORITY:

		args->value = ctx->priority;

		args->value = ctx->sched.priority;

		break;

	default:

		ret = -EINVAL;
@@ -826,7 +826,7 @@ int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data, 
				 !capable(CAP_SYS_NICE))

				ret = -EPERM;

			else

				ctx->priority = priority;

				ctx->sched.priority = priority;

		}

		break;

drivers/gpu/drm/i915/i915_gem_context.h

+1 −12
Original line number Diff line number Diff line
@@ -137,18 +137,7 @@ struct i915_gem_context { 
	 */

	u32 user_handle;



	/**

	 * @priority: execution and service priority

	 *

	 * All clients are equal, but some are more equal than others!

	 *

	 * Requests from a context with a greater (more positive) value of

	 * @priority will be executed before those with a lower @priority

	 * value, forming a simple QoS.

	 *

	 * The &drm_i915_private.kernel_context is assigned the lowest priority.

	 */

	int priority;

	struct i915_sched_attr sched;



	/** ggtt_offset_bias: placement restriction for context objects */

	u32 ggtt_offset_bias;