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Commit b715ce94 authored by Matt Carlson's avatar Matt Carlson Committed by David S. Miller
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tg3: Fix link down notify failure when EEE disabled 



Occasionally, when the network cable is removed after a successful
autonegotiation, the device will not send a link down interrupt to the
driver.  This happens because of a bad interaction of an EEE
workaround.  The fix is to adjust the code so that the root cause
condition does not happen.

Signed-off-by: default avatarMatt Carlson <mcarlson@broadcom.com>
Reviewed-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent be671947

drivers/net/tg3.c

+25 −13
Original line number Diff line number Diff line
@@ -1858,6 +1858,12 @@ static void tg3_phy_eee_adjust(struct tg3 *tp, u32 current_link_up) 
	}



	if (!tp->setlpicnt) {

		if (current_link_up == 1 &&

		   !TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) {

			tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, 0x0000);

			TG3_PHY_AUXCTL_SMDSP_DISABLE(tp);

		}



		val = tr32(TG3_CPMU_EEE_MODE);

		tw32(TG3_CPMU_EEE_MODE, val & ~TG3_CPMU_EEEMD_LPI_ENABLE);

	}
@@ -1872,7 +1878,9 @@ static void tg3_phy_eee_enable(struct tg3 *tp) 
	     GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||

	     GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&

	    !TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) {

		tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, 0x0003);

		val = MII_TG3_DSP_TAP26_ALNOKO |

		      MII_TG3_DSP_TAP26_RMRXSTO;

		tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val);

		TG3_PHY_AUXCTL_SMDSP_DISABLE(tp);

	}
@@ -3128,10 +3136,23 @@ static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl) 
	if (!err) {

		u32 err2;



		val = 0;

		/* Advertise 100-BaseTX EEE ability */

		if (advertise & ADVERTISED_100baseT_Full)

			val |= MDIO_AN_EEE_ADV_100TX;

		/* Advertise 1000-BaseT EEE ability */

		if (advertise & ADVERTISED_1000baseT_Full)

			val |= MDIO_AN_EEE_ADV_1000T;

		err = tg3_phy_cl45_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);

		if (err)

			val = 0;



		switch (GET_ASIC_REV(tp->pci_chip_rev_id)) {

		case ASIC_REV_5717:

		case ASIC_REV_57765:

		case ASIC_REV_5719:

			/* If we advertised any eee advertisements above... */

			if (val)

				val = MII_TG3_DSP_TAP26_ALNOKO |

				      MII_TG3_DSP_TAP26_RMRXSTO |

				      MII_TG3_DSP_TAP26_OPCSINPT;
@@ -3143,15 +3164,6 @@ static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl) 
						 MII_TG3_DSP_CH34TP2_HIBW01);

		}



		val = 0;

		/* Advertise 100-BaseTX EEE ability */

		if (advertise & ADVERTISED_100baseT_Full)

			val |= MDIO_AN_EEE_ADV_100TX;

		/* Advertise 1000-BaseT EEE ability */

		if (advertise & ADVERTISED_1000baseT_Full)

			val |= MDIO_AN_EEE_ADV_1000T;

		err = tg3_phy_cl45_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);



		err2 = TG3_PHY_AUXCTL_SMDSP_DISABLE(tp);

		if (!err)

			err = err2;