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Commit b61d6075 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2017-03-29' of... 

Merge tag 'drm-intel-fixes-2017-03-29' of git://anongit.freedesktop.org/git/drm-intel into drm-fixes

drm/i915 fixes for v4.11-rc5

* tag 'drm-intel-fixes-2017-03-29' of git://anongit.freedesktop.org/git/drm-intel:
  drm/i915: Restore marking context objects as dirty on pinning
  drm/i915/gvt: Use force single submit flag to distinguish gvt request from i915 request
  drm/i915/gvt: set shadow entry to scratch page while p2m failed
  drm/i915/gvt: Fix guest fail to read EDID leading to black guest console issue.
  drm/i915/gvt: fix wrong offset when loading RCS mocs
  drm/i915/gvt: add write handler for mmio mbctl
  drm/i915/kvmgt: Hold struct kvm reference
parents 4adf0436 0abfe7e2

drivers/gpu/drm/i915/gvt/edid.c

+2 −1
Original line number Diff line number Diff line
@@ -495,7 +495,8 @@ void intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu, 
			unsigned char val = edid_get_byte(vgpu);



			aux_data_for_write = (val << 16);

		}

		} else

			aux_data_for_write = (0xff << 16);

	}

	/* write the return value in AUX_CH_DATA reg which includes:

	 * ACK of I2C_WRITE

drivers/gpu/drm/i915/gvt/gtt.c

+6 −2
Original line number Diff line number Diff line
@@ -1837,11 +1837,15 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, 
		ret = gtt_entry_p2m(vgpu, &e, &m);

		if (ret) {

			gvt_vgpu_err("fail to translate guest gtt entry\n");

			return ret;

			/* guest driver may read/write the entry when partial

			 * update the entry in this situation p2m will fail

			 * settting the shadow entry to point to a scratch page

			 */

			ops->set_pfn(&m, gvt->gtt.scratch_ggtt_mfn);

		}

	} else {

		m = e;

		m.val64 = 0;

		ops->set_pfn(&m, gvt->gtt.scratch_ggtt_mfn);

	}



	ggtt_set_shadow_entry(ggtt_mm, &m, g_gtt_index);

drivers/gpu/drm/i915/gvt/handlers.c

+9 −1
Original line number Diff line number Diff line
@@ -970,6 +970,14 @@ static int dp_aux_ch_ctl_mmio_write(struct intel_vgpu *vgpu, 
	return 0;

}



static int mbctl_write(struct intel_vgpu *vgpu, unsigned int offset,

		void *p_data, unsigned int bytes)

{

	*(u32 *)p_data &= (~GEN6_MBCTL_ENABLE_BOOT_FETCH);

	write_vreg(vgpu, offset, p_data, bytes);

	return 0;

}



static int vga_control_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

		void *p_data, unsigned int bytes)

{
@@ -2238,7 +2246,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt) 
	MMIO_D(0x7180, D_ALL);

	MMIO_D(0x7408, D_ALL);

	MMIO_D(0x7c00, D_ALL);

	MMIO_D(GEN6_MBCTL, D_ALL);

	MMIO_DH(GEN6_MBCTL, D_ALL, NULL, mbctl_write);

	MMIO_D(0x911c, D_ALL);

	MMIO_D(0x9120, D_ALL);

	MMIO_DFH(GEN7_UCGCTL4, D_ALL, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/kvmgt.c

+2 −0
Original line number Diff line number Diff line
@@ -1326,6 +1326,7 @@ static int kvmgt_guest_init(struct mdev_device *mdev) 
	vgpu->handle = (unsigned long)info;

	info->vgpu = vgpu;

	info->kvm = kvm;

	kvm_get_kvm(info->kvm);



	kvmgt_protect_table_init(info);

	gvt_cache_init(vgpu);
@@ -1347,6 +1348,7 @@ static bool kvmgt_guest_exit(struct kvmgt_guest_info *info) 
	}



	kvm_page_track_unregister_notifier(info->kvm, &info->track_node);

	kvm_put_kvm(info->kvm);

	kvmgt_protect_table_destroy(info);

	gvt_cache_destroy(info->vgpu);

	vfree(info);

drivers/gpu/drm/i915/gvt/render.c

+1 −1
Original line number Diff line number Diff line
@@ -207,7 +207,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id) 
		l3_offset.reg = 0xb020;

		for (i = 0; i < 32; i++) {

			gen9_render_mocs_L3[i] = I915_READ(l3_offset);

			I915_WRITE(l3_offset, vgpu_vreg(vgpu, offset));

			I915_WRITE(l3_offset, vgpu_vreg(vgpu, l3_offset));

			POSTING_READ(l3_offset);

			l3_offset.reg += 4;

		}