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Commit b5e2fec0 authored by Alexander Graf's avatar Alexander Graf Committed by Avi Kivity
Browse files

KVM: Ignore DEBUGCTL MSRs with no effect 



Netware writes to DEBUGCTL and reads from the DEBUGCTL and LAST*IP MSRs
without further checks and is really confused to receive a #GP during that.
To make it happy we should just make them stubs, which is exactly what SVM
already does.

Writes to DEBUGCTL that are vendor-specific are resembled to behave as if the
virtual CPU does not know them.

Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
Signed-off-by: default avatarAvi Kivity <avi@qumranet.com>
parent 313dbd49

arch/x86/kvm/x86.c

+17 −0
Original line number Diff line number Diff line
@@ -665,6 +665,18 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) 
		pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",

			__func__, data);

		break;

	case MSR_IA32_DEBUGCTLMSR:

		if (!data) {

			/* We support the non-activated case already */

			break;

		} else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {

			/* Values other than LBR and BTF are vendor-specific,

			   thus reserved and should throw a #GP */

			return 1;

		}

		pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",

			__func__, data);

		break;

	case MSR_IA32_UCODE_REV:

	case MSR_IA32_UCODE_WRITE:

		break;
@@ -757,6 +769,11 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) 
	case MSR_IA32_MC0_MISC+16:

	case MSR_IA32_UCODE_REV:

	case MSR_IA32_EBL_CR_POWERON:

	case MSR_IA32_DEBUGCTLMSR:

	case MSR_IA32_LASTBRANCHFROMIP:

	case MSR_IA32_LASTBRANCHTOIP:

	case MSR_IA32_LASTINTFROMIP:

	case MSR_IA32_LASTINTTOIP:

		data = 0;

		break;

	case MSR_MTRRcap: