[MIPS] SMTC: Fix crash on bootup with idebus= command line argument.

#define IDE_ARCH_OBSOLETE_DEFAULTS

static __inline__ int ide_probe_legacy(void)

{

#ifdef CONFIG_PCI

	struct pci_dev *dev;

	if ((dev = pci_get_class(PCI_CLASS_BRIDGE_EISA << 8, NULL)) != NULL ||

	    (dev = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL)) != NULL) {

		pci_dev_put(dev);

		return 1;

	}

	return 0;

#elif defined(CONFIG_EISA) || defined(CONFIG_ISA)

	return 1;

#else

	return 0;

#endif

}

static __inline__ int ide_default_irq(unsigned long base)

{

	if (ide_probe_legacy())

	switch (base) {

		case 0x1f0:

			return 14;

		case 0x170:

			return 15;

		case 0x1e8:

			return 11;

		case 0x168:

			return 10;

		case 0x1e0:

			return 8;

		case 0x160:

			return 12;

		case 0x1f0: return 14;

		case 0x170: return 15;

		case 0x1e8: return 11;

		case 0x168: return 10;

		case 0x1e0: return 8;

		case 0x160: return 12;

		default:

			return 0;

	}

	else

		return 0;

}

static __inline__ unsigned long ide_default_io_base(int index)

{

	if (ide_probe_legacy())

	/*

	 *      If PCI is present then it is not safe to poke around

	 *      the other legacy IDE ports. Only 0x1f0 and 0x170 are

	 *      defined compatibility mode ports for PCI. A user can

	 *      override this using ide= but we must default safe.

	 */

	if (no_pci_devices()) {

		switch (index) {

		case 0:

			return 0x1f0;

		case 1:

			return 0x170;

		case 2:

			return 0x1e8;

		case 3:

			return 0x168;

		case 4:

			return 0x1e0;

		case 5:

			return 0x160;

		case 2: return 0x1e8;

		case 3: return 0x168;

		case 4: return 0x1e0;

		case 5: return 0x160;

		}

	}

	switch (index) {

	case 0: return 0x1f0;

	case 1: return 0x170;

	default:

		return 0;

	}

	else

		return 0;

}

#define IDE_ARCH_OBSOLETE_INIT