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Commit b5010d20 authored by Jisheng Zhang's avatar Jisheng Zhang Committed by Sebastian Hesselbarth
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ARM: dts: berlin: add 2nd clock for BG2Q sdhci0 and sdhci1 



We removed CLK_IGNORE_UNUSED from CLKID_SDIO's flag, so the sdhci0 and
sdhci1 don't work. We fix this by adding the optional 2nd clock for
BG2Q's sdhci0 and sdhci1. This patch brings another benefit: the 2nd
clock can be disabled during runtime pm, so saves power a bit.

Signed-off-by: default avatarJisheng Zhang <jszhang@marvell.com>
Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
parent 5d756147

arch/arm/boot/dts/berlin2q.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -118,7 +118,8 @@ 
		sdhci0: sdhci@ab0000 {

			compatible = "mrvl,pxav3-mmc";

			reg = <0xab0000 0x200>;

			clocks = <&chip_clk CLKID_SDIO1XIN>;

			clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;

			clock-names = "io", "core";

			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

			status = "disabled";

		};
@@ -126,7 +127,8 @@ 
		sdhci1: sdhci@ab0800 {

			compatible = "mrvl,pxav3-mmc";

			reg = <0xab0800 0x200>;

			clocks = <&chip_clk CLKID_SDIO1XIN>;

			clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;

			clock-names = "io", "core";

			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

			status = "disabled";

		};