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Commit b3eafc5a authored by Daniel Vetter's avatar Daniel Vetter Committed by Chris Wilson
Browse files

intel-gtt: save PGETBL_CTL later in the setup process 



... and switch to a more classical store-reg-on-suspend, restore-on-resume
way of doing things. Obviously this is just preparation for the future,
the code is not there at all, yet.

This is needed because the next patch adjusts this register and everything
in it (not just the pagetable address) needs to be restored on resume.

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 53984635

drivers/char/agp/intel-gtt.c

+7 −7
Original line number Diff line number Diff line
@@ -95,7 +95,7 @@ static struct _intel_private { 
	u8 __iomem *registers;

	phys_addr_t gtt_bus_addr;

	phys_addr_t gma_bus_addr;

	phys_addr_t pte_bus_addr;

	u32 PGETBL_save;

	u32 __iomem *gtt;		/* I915G */

	int num_dcache_entries;

	union {
@@ -755,6 +755,11 @@ static int intel_gtt_init(void) 
	intel_private.base.gtt_mappable_entries = intel_gtt_mappable_entries();

	intel_private.base.gtt_total_entries = intel_gtt_total_entries();



	/* save the PGETBL reg for resume */

	intel_private.PGETBL_save =

		readl(intel_private.registers+I810_PGETBL_CTL)

			& ~I810_PGETBL_ENABLED;



	dev_info(&intel_private.bridge_dev->dev,

			"detected gtt size: %dK total, %dK mappable\n",

			intel_private.base.gtt_total_entries * 4,
@@ -891,7 +896,7 @@ static void intel_enable_gtt(void) 
	gmch_ctrl |= I830_GMCH_ENABLED;

	pci_write_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, gmch_ctrl);



	writel(intel_private.pte_bus_addr|I810_PGETBL_ENABLED,

	writel(intel_private.PGETBL_save|I810_PGETBL_ENABLED,

	       intel_private.registers+I810_PGETBL_CTL);

	readl(intel_private.registers+I810_PGETBL_CTL);	/* PCI Posting. */

}
@@ -908,8 +913,6 @@ static int i830_setup(void) 
		return -ENOMEM;



	intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE;

	intel_private.pte_bus_addr =

		readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;



	intel_i830_setup_flush();
@@ -1265,9 +1268,6 @@ static int i9xx_setup(void) 
		intel_private.gtt_bus_addr = reg_addr + gtt_offset;

	}



	intel_private.pte_bus_addr =

		readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;



	intel_i9xx_setup_flush();



	return 0;