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Commit b3dd6bc1 authored by Senthil Balasubramanian's avatar Senthil Balasubramanian Committed by John W. Linville
Browse files

ath9k_hw: Add new member into the eeprom structure. 



Add eeprom base extension structures which are needed for
AR938x caliberation changes and gain calculation.

Signed-off-by: default avatarSenthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent a9d85fbd

drivers/net/wireless/ath/ath9k/ar9003_eeprom.c

+15 −6
Original line number Original line Diff line number Diff line
@@ -147,10 +147,13 @@ static const struct ar9300_eeprom ar9300_default = { 
		.papdRateMaskHt20 = LE32(0x80c080),

		.papdRateMaskHt20 = LE32(0x80c080),

		.papdRateMaskHt40 = LE32(0x80c080),

		.papdRateMaskHt40 = LE32(0x80c080),

		.futureModal = {

		.futureModal = {

			0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

			0, 0, 0, 0, 0, 0, 0, 0

		},

		},

	 },

	 },

	.base_ext1 = {

		.ant_div_control = 0,

		.future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}

	},

	.calFreqPier2G = {

	.calFreqPier2G = {

		FREQ2FBIN(2412, 1),

		FREQ2FBIN(2412, 1),

		FREQ2FBIN(2437, 1),

		FREQ2FBIN(2437, 1),
@@ -285,8 +288,7 @@ static const struct ar9300_eeprom ar9300_default = { 
			/* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),

			/* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),

			/* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),

			/* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),

			/* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),

			/* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),

			/* Data[11].ctlEdges[3].bChannel */

			/* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),

			FREQ2FBIN(2462, 1),

		}

		}

	 },

	 },

	.ctlPowerData_2G = {

	.ctlPowerData_2G = {
@@ -346,9 +348,16 @@ static const struct ar9300_eeprom ar9300_default = { 
		.papdRateMaskHt20 = LE32(0xf0e0e0),

		.papdRateMaskHt20 = LE32(0xf0e0e0),

		.papdRateMaskHt40 = LE32(0xf0e0e0),

		.papdRateMaskHt40 = LE32(0xf0e0e0),

		.futureModal = {

		.futureModal = {

			0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

			0, 0, 0, 0, 0, 0, 0, 0

		},

	 },

	 },

	.base_ext2 = {

		.tempSlopeLow = 0,

		.tempSlopeHigh = 0,

		.xatten1DBLow = {0, 0, 0},

		.xatten1MarginLow = {0, 0, 0},

		.xatten1DBHigh = {0, 0, 0},

		.xatten1MarginHigh = {0, 0, 0}

	},

	},

	.calFreqPier5G = {

	.calFreqPier5G = {

		FREQ2FBIN(5180, 0),

		FREQ2FBIN(5180, 0),

drivers/net/wireless/ath/ath9k/ar9003_eeprom.h

+17 −1
Original line number Original line Diff line number Diff line
@@ -236,7 +236,7 @@ struct ar9300_modal_eep_header { 
	u8 thresh62;

	u8 thresh62;

	__le32 papdRateMaskHt20;

	__le32 papdRateMaskHt20;

	__le32 papdRateMaskHt40;

	__le32 papdRateMaskHt40;

	u8 futureModal[24];

	u8 futureModal[10];

} __packed;

} __packed;





struct ar9300_cal_data_per_freq_op_loop {

struct ar9300_cal_data_per_freq_op_loop {
@@ -274,6 +274,20 @@ struct cal_ctl_data_5g { 
	struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G];

	struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G];

} __packed;

} __packed;





struct ar9300_BaseExtension_1 {

	u8 ant_div_control;

	u8 future[13];

} __packed;



struct ar9300_BaseExtension_2 {

	int8_t    tempSlopeLow;

	int8_t    tempSlopeHigh;

	u8   xatten1DBLow[AR9300_MAX_CHAINS];

	u8   xatten1MarginLow[AR9300_MAX_CHAINS];

	u8   xatten1DBHigh[AR9300_MAX_CHAINS];

	u8   xatten1MarginHigh[AR9300_MAX_CHAINS];

} __packed;



struct ar9300_eeprom {

struct ar9300_eeprom {

	u8 eepromVersion;

	u8 eepromVersion;

	u8 templateVersion;

	u8 templateVersion;
@@ -283,6 +297,7 @@ struct ar9300_eeprom { 
	struct ar9300_base_eep_hdr baseEepHeader;

	struct ar9300_base_eep_hdr baseEepHeader;





	struct ar9300_modal_eep_header modalHeader2G;

	struct ar9300_modal_eep_header modalHeader2G;

	struct ar9300_BaseExtension_1 base_ext1;

	u8 calFreqPier2G[AR9300_NUM_2G_CAL_PIERS];

	u8 calFreqPier2G[AR9300_NUM_2G_CAL_PIERS];

	struct ar9300_cal_data_per_freq_op_loop

	struct ar9300_cal_data_per_freq_op_loop

	 calPierData2G[AR9300_MAX_CHAINS][AR9300_NUM_2G_CAL_PIERS];

	 calPierData2G[AR9300_MAX_CHAINS][AR9300_NUM_2G_CAL_PIERS];
@@ -302,6 +317,7 @@ struct ar9300_eeprom { 
	u8 ctl_freqbin_2G[AR9300_NUM_CTLS_2G][AR9300_NUM_BAND_EDGES_2G];

	u8 ctl_freqbin_2G[AR9300_NUM_CTLS_2G][AR9300_NUM_BAND_EDGES_2G];

	struct cal_ctl_data_2g ctlPowerData_2G[AR9300_NUM_CTLS_2G];

	struct cal_ctl_data_2g ctlPowerData_2G[AR9300_NUM_CTLS_2G];

	struct ar9300_modal_eep_header modalHeader5G;

	struct ar9300_modal_eep_header modalHeader5G;

	struct ar9300_BaseExtension_2 base_ext2;

	u8 calFreqPier5G[AR9300_NUM_5G_CAL_PIERS];

	u8 calFreqPier5G[AR9300_NUM_5G_CAL_PIERS];

	struct ar9300_cal_data_per_freq_op_loop

	struct ar9300_cal_data_per_freq_op_loop

	 calPierData5G[AR9300_MAX_CHAINS][AR9300_NUM_5G_CAL_PIERS];

	 calPierData5G[AR9300_MAX_CHAINS][AR9300_NUM_5G_CAL_PIERS];