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Commit b399151c authored by Jia Zhang's avatar Jia Zhang Committed by Ingo Molnar
Browse files

x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping 



x86_mask is a confusing name which is hard to associate with the
processor's stepping.

Additionally, correct an indent issue in lib/cpu.c.

Signed-off-by: default avatarJia Zhang <qianyue.zj@alibaba-inc.com>
[ Updated it to more recent kernels. ]
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: bp@alien8.de
Cc: tony.luck@intel.com
Link: http://lkml.kernel.org/r/1514771530-70829-1-git-send-email-qianyue.zj@alibaba-inc.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 961888b1

arch/x86/events/intel/core.c

+1 −1
Original line number Diff line number Diff line
@@ -3559,7 +3559,7 @@ static int intel_snb_pebs_broken(int cpu) 
		break;



	case INTEL_FAM6_SANDYBRIDGE_X:

		switch (cpu_data(cpu).x86_mask) {

		switch (cpu_data(cpu).x86_stepping) {

		case 6: rev = 0x618; break;

		case 7: rev = 0x70c; break;

		}

arch/x86/events/intel/lbr.c

+1 −1
Original line number Diff line number Diff line
@@ -1186,7 +1186,7 @@ void __init intel_pmu_lbr_init_atom(void) 
	 * on PMU interrupt

	 */

	if (boot_cpu_data.x86_model == 28

	    && boot_cpu_data.x86_mask < 10) {

	    && boot_cpu_data.x86_stepping < 10) {

		pr_cont("LBR disabled due to erratum");

		return;

	}

arch/x86/events/intel/p6.c

+1 −1
Original line number Diff line number Diff line
@@ -234,7 +234,7 @@ static __initconst const struct x86_pmu p6_pmu = { 


static __init void p6_pmu_rdpmc_quirk(void)

{

	if (boot_cpu_data.x86_mask < 9) {

	if (boot_cpu_data.x86_stepping < 9) {

		/*

		 * PPro erratum 26; fixed in stepping 9 and above.

		 */

arch/x86/include/asm/acpi.h

+1 −1
Original line number Diff line number Diff line
@@ -94,7 +94,7 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate) 
	if (boot_cpu_data.x86 == 0x0F &&

	    boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&

	    boot_cpu_data.x86_model <= 0x05 &&

	    boot_cpu_data.x86_mask < 0x0A)

	    boot_cpu_data.x86_stepping < 0x0A)

		return 1;

	else if (boot_cpu_has(X86_BUG_AMD_APIC_C1E))

		return 1;

arch/x86/include/asm/processor.h

+1 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ struct cpuinfo_x86 { 
	__u8			x86;		/* CPU family */

	__u8			x86_vendor;	/* CPU vendor */

	__u8			x86_model;

	__u8			x86_mask;

	__u8			x86_stepping;

#ifdef CONFIG_X86_64

	/* Number of 4K pages in DTLB/ITLB combined(in pages): */

	int			x86_tlbsize;