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Commit b3603e17 authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Michael Ellerman
Browse files

powerpc/mm: update radix__ptep_set_access_flag to not do full mm tlb flush 



When we are updating a pte, we just need to flush the tlb mapping
that pte. Right now we do a full mm flush because we don't track the page
size. Now that we have page size details in pte use that to do the
optimized flush

Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 6d3a0379

arch/powerpc/include/asm/book3s/32/pgtable.h

+2 −1
Original line number Diff line number Diff line
@@ -224,7 +224,8 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, 




static inline void __ptep_set_access_flags(struct mm_struct *mm,

					   pte_t *ptep, pte_t entry)

					   pte_t *ptep, pte_t entry,

					   unsigned long address)

{

	unsigned long set = pte_val(entry) &

		(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);

arch/powerpc/include/asm/book3s/64/pgtable.h

+3 −2
Original line number Diff line number Diff line
@@ -578,10 +578,11 @@ static inline bool check_pte_access(unsigned long access, unsigned long ptev) 
 */



static inline void __ptep_set_access_flags(struct mm_struct *mm,

					   pte_t *ptep, pte_t entry)

					   pte_t *ptep, pte_t entry,

					   unsigned long address)

{

	if (radix_enabled())

		return radix__ptep_set_access_flags(mm, ptep, entry);

		return radix__ptep_set_access_flags(mm, ptep, entry, address);

	return hash__ptep_set_access_flags(ptep, entry);

}

arch/powerpc/include/asm/book3s/64/radix.h

+3 −8
Original line number Diff line number Diff line
@@ -167,7 +167,8 @@ static inline unsigned long radix__pte_update(struct mm_struct *mm, 
 * function doesn't need to invalidate tlb.

 */

static inline void radix__ptep_set_access_flags(struct mm_struct *mm,

						pte_t *ptep, pte_t entry)

						pte_t *ptep, pte_t entry,

						unsigned long address)

{



	unsigned long set = pte_val(entry) & (_PAGE_DIRTY | _PAGE_ACCESSED |
@@ -183,13 +184,7 @@ static inline void radix__ptep_set_access_flags(struct mm_struct *mm, 
		 * new value of pte

		 */

		new_pte = old_pte | set;



		/*

		 * For now let's do heavy pid flush

		 * radix__flush_tlb_page_psize(mm, addr, mmu_virtual_psize);

		 */

		radix__flush_tlb_mm(mm);



		radix__flush_tlb_pte_p9_dd1(old_pte, mm, address);

		__radix_pte_update(ptep, 0, new_pte);

	} else

		__radix_pte_update(ptep, 0, set);

arch/powerpc/include/asm/nohash/32/pgtable.h

+2 −1
Original line number Diff line number Diff line
@@ -268,7 +268,8 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, 




static inline void __ptep_set_access_flags(struct mm_struct *mm,

					   pte_t *ptep, pte_t entry)

					   pte_t *ptep, pte_t entry,

					   unsigned long address)

{

	unsigned long set = pte_val(entry) &

		(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);

arch/powerpc/include/asm/nohash/64/pgtable.h

+2 −1
Original line number Diff line number Diff line
@@ -289,7 +289,8 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, 
 * function doesn't need to flush the hash entry

 */

static inline void __ptep_set_access_flags(struct mm_struct *mm,

					   pte_t *ptep, pte_t entry)

					   pte_t *ptep, pte_t entry,

					   unsigned long address)

{

	unsigned long bits = pte_val(entry) &

		(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);