Merge remote-tracking branches 'spi/topic/octeon', 'spi/topic/omap2-mcspi',...

Microchip PIC32 SPI Master controller

Required properties:

- compatible: Should be "microchip,pic32mzda-spi".

- reg: Address and length of register space for the device.

- interrupts: Should contain all three spi interrupts in sequence

              of <fault-irq>, <receive-irq>, <transmit-irq>.

- interrupt-names: Should be "fault", "rx", "tx" in order.

- clocks: Phandle of the clock generating SPI clock on the bus.

- clock-names: Should be "mck0".

- cs-gpios: Specifies the gpio pins to be used for chipselects.

            See: Documentation/devicetree/bindings/spi/spi-bus.txt

Optional properties:

- dmas: Two or more DMA channel specifiers following the convention outlined

        in Documentation/devicetree/bindings/dma/dma.txt

- dma-names: Names for the dma channels. There must be at least one channel

             named "spi-tx" for transmit and named "spi-rx" for receive.

Example:

spi1: spi@1f821000 {

        compatible = "microchip,pic32mzda-spi";

        reg = <0x1f821000 0x200>;

        interrupts = <109 IRQ_TYPE_LEVEL_HIGH>,

                     <110 IRQ_TYPE_LEVEL_HIGH>,

                     <111 IRQ_TYPE_LEVEL_HIGH>;

        interrupt-names = "fault", "rx", "tx";

        clocks = <&PBCLK2>;

        clock-names = "mck0";

        cs-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;

        dmas = <&dma 134>, <&dma 135>;

        dma-names = "spi-rx", "spi-tx";

};

Microchip PIC32 Quad SPI controller

-----------------------------------

Required properties:

- compatible: Should be "microchip,pic32mzda-sqi".

- reg: Address and length of SQI controller register space.

- interrupts: Should contain SQI interrupt.

- clocks: Should contain phandle of two clocks in sequence, one that drives

          clock on SPI bus and other that drives SQI controller.

- clock-names: Should be "spi_ck" and "reg_ck" in order.

Example:

	sqi1: spi@1f8e2000 {

		compatible = "microchip,pic32mzda-sqi";

		reg = <0x1f8e2000 0x200>;

		clocks = <&rootclk REF2CLK>, <&rootclk PB5CLK>;

		clock-names = "spi_ck", "reg_ck";

		interrupts = <169 IRQ_TYPE_LEVEL_HIGH>;

	};

config SPI_ORION

	tristate "Orion SPI master"

	depends on PLAT_ORION || COMPILE_TEST

	depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST

	help

	  This enables using the SPI master controller on the Orion chips.

config SPI_PIC32

	tristate "Microchip PIC32 series SPI"

	depends on MACH_PIC32 || COMPILE_TEST

	help

	  SPI driver for Microchip PIC32 SPI master controller.

config SPI_PIC32_SQI

	tristate "Microchip PIC32 Quad SPI driver"

	depends on MACH_PIC32 || COMPILE_TEST

	depends on HAS_DMA

	help

	  SPI driver for PIC32 Quad SPI controller.

config SPI_PL022

	tristate "ARM AMBA PL022 SSP controller"

	depends on ARM_AMBA

obj-$(CONFIG_SPI_OMAP24XX)		+= spi-omap2-mcspi.o

obj-$(CONFIG_SPI_TI_QSPI)		+= spi-ti-qspi.o

obj-$(CONFIG_SPI_ORION)			+= spi-orion.o

obj-$(CONFIG_SPI_PIC32)			+= spi-pic32.o

obj-$(CONFIG_SPI_PIC32_SQI)		+= spi-pic32-sqi.o

obj-$(CONFIG_SPI_PL022)			+= spi-pl022.o

obj-$(CONFIG_SPI_PPC4xx)		+= spi-ppc4xx.o

spi-pxa2xx-platform-objs		:= spi-pxa2xx.o spi-pxa2xx-dma.o

static int octeon_spi_probe(struct platform_device *pdev)

{

	struct resource *res_mem;

	void __iomem *reg_base;

	struct spi_master *master;

	struct octeon_spi *p;

	int err = -ENOENT;

	platform_set_drvdata(pdev, master);

	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	if (res_mem == NULL) {

		dev_err(&pdev->dev, "found no memory resource\n");

		err = -ENXIO;

		goto fail;

	}

	if (!devm_request_mem_region(&pdev->dev, res_mem->start,

				     resource_size(res_mem), res_mem->name)) {

		dev_err(&pdev->dev, "request_mem_region failed\n");

	reg_base = devm_ioremap_resource(&pdev->dev, res_mem);

	if (IS_ERR(reg_base)) {

		err = PTR_ERR(reg_base);

		goto fail;

	}

	p->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start,

					     resource_size(res_mem));

	p->register_base = (u64)reg_base;

	master->num_chipselect = 4;

	master->mode_bits = SPI_CPHA |