Loading fw/wmi_unified.h +13 −0 Original line number Original line Diff line number Diff line Loading @@ -9439,6 +9439,19 @@ typedef enum { * default to immediate LMR feedback. * default to immediate LMR feedback. **/ **/ WMI_PDEV_PARAM_ENABLE_DELAYED_LMR_FEEDBACK, WMI_PDEV_PARAM_ENABLE_DELAYED_LMR_FEEDBACK, /* DFS_RADAR_MASK: Radar mask setting programmed in HW registers. * bit | config_mode * ----------------------- * 0 - 15 | Each bit represents a 20 MHz portion of the channel. * | 0-Unmasked 1-Masked * 16 - 31 | Reserved. * Bit 0 represents the highest 20 MHz portion within the channel. * For example... * For a 80 MHz channel, bit0 = highest 20 MHz, bit3 = lowest 20 MHz * For a 320 MHz channel, bit0 = highest 20 MHz, bit15 = lowest 20 MHz */ WMI_PDEV_PARAM_DFS_RADAR_MASK, } WMI_PDEV_PARAM; } WMI_PDEV_PARAM; #define WMI_PDEV_ONLY_BSR_TRIG_IS_ENABLED(trig_type) WMI_GET_BITS(trig_type, 0, 1) #define WMI_PDEV_ONLY_BSR_TRIG_IS_ENABLED(trig_type) WMI_GET_BITS(trig_type, 0, 1) fw/wmi_version.h +1 −1 Original line number Original line Diff line number Diff line Loading @@ -37,7 +37,7 @@ #define __WMI_VER_MINOR_ 0 #define __WMI_VER_MINOR_ 0 /** WMI revision number has to be incremented when there is a /** WMI revision number has to be incremented when there is a * change that may or may not break compatibility. */ * change that may or may not break compatibility. */ #define __WMI_REVISION_ 1430 #define __WMI_REVISION_ 1431 /** The Version Namespace should not be normally changed. Only /** The Version Namespace should not be normally changed. Only * host and firmware of the same WMI namespace will work * host and firmware of the same WMI namespace will work Loading Loading
fw/wmi_unified.h +13 −0 Original line number Original line Diff line number Diff line Loading @@ -9439,6 +9439,19 @@ typedef enum { * default to immediate LMR feedback. * default to immediate LMR feedback. **/ **/ WMI_PDEV_PARAM_ENABLE_DELAYED_LMR_FEEDBACK, WMI_PDEV_PARAM_ENABLE_DELAYED_LMR_FEEDBACK, /* DFS_RADAR_MASK: Radar mask setting programmed in HW registers. * bit | config_mode * ----------------------- * 0 - 15 | Each bit represents a 20 MHz portion of the channel. * | 0-Unmasked 1-Masked * 16 - 31 | Reserved. * Bit 0 represents the highest 20 MHz portion within the channel. * For example... * For a 80 MHz channel, bit0 = highest 20 MHz, bit3 = lowest 20 MHz * For a 320 MHz channel, bit0 = highest 20 MHz, bit15 = lowest 20 MHz */ WMI_PDEV_PARAM_DFS_RADAR_MASK, } WMI_PDEV_PARAM; } WMI_PDEV_PARAM; #define WMI_PDEV_ONLY_BSR_TRIG_IS_ENABLED(trig_type) WMI_GET_BITS(trig_type, 0, 1) #define WMI_PDEV_ONLY_BSR_TRIG_IS_ENABLED(trig_type) WMI_GET_BITS(trig_type, 0, 1)
fw/wmi_version.h +1 −1 Original line number Original line Diff line number Diff line Loading @@ -37,7 +37,7 @@ #define __WMI_VER_MINOR_ 0 #define __WMI_VER_MINOR_ 0 /** WMI revision number has to be incremented when there is a /** WMI revision number has to be incremented when there is a * change that may or may not break compatibility. */ * change that may or may not break compatibility. */ #define __WMI_REVISION_ 1430 #define __WMI_REVISION_ 1431 /** The Version Namespace should not be normally changed. Only /** The Version Namespace should not be normally changed. Only * host and firmware of the same WMI namespace will work * host and firmware of the same WMI namespace will work Loading