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Commit b2c3b216 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'samsung-dt64-4.10-2' of... 

Merge tag 'samsung-dt64-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64

Pull "Samsung DeviceTree arm64 second update for v4.10" from Krzysztof Kozłowski:

1. Add Performance Monitor Unit to Exynos7.
2. Add MFC, JPEG and Gscaler to Exynos5433 based TM2 board.
3. Cleanups and fixes for recently added TM2 and TM2E boards.

* tag 'samsung-dt64-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Enable HS400 mode for eMMC for TM2
  arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash
  arm64: dts: exynos: TM2 - add support for MFC video codec device
  arm64: dts: exynos: TM2 - add support for JPEG codec device
  arm64: dts: exynos: TM2 - add support for GScaler devices
  arm64: dts: exynos: TM2 - remove unused UART3 and set clocks directly on CMU
  arm64: dts: exynos: Assign parent clock of the clkout clock for TM2 board
  arm64: dts: exynos: Move FSYS CMU configuration from Exynos5433 dtsi to TM2 dts
  arm64: dts: exynos: Add missing parent clocks to audio block in Exynos5433 SoC
  arm64: dts: exynos: Fix FSYS CMU parent clocks in Exynos5433 SoC
  arm64: dts: exynos: Fix IRQ type flags for Exynos5433 SoC
  arm64: dts: Add ARM PMU node for exynos7
parents 7b88f1a4 2a4c744f

arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi

+16 −6
Original line number Diff line number Diff line
@@ -40,9 +40,14 @@ 


		interrupt-controller;

		interrupt-parent = <&gic>;

		interrupts = <GIC_SPI 0 0>, <GIC_SPI 1 0>, <GIC_SPI 2 0>,

			<GIC_SPI 3 0>, <GIC_SPI 4 0>, <GIC_SPI 5 0>,

			<GIC_SPI 6 0>, <GIC_SPI 7 0>;

		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;

		#interrupt-cells = <2>;

	};
@@ -52,9 +57,14 @@ 


		interrupt-controller;

		interrupt-parent = <&gic>;

		interrupts = <GIC_SPI 8 0>, <GIC_SPI 9 0>, <GIC_SPI 10 0>,

			<GIC_SPI 11 0>, <GIC_SPI 12 0>, <GIC_SPI 13 0>,

			<GIC_SPI 14 0>, <GIC_SPI 15 0>;

		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;

		#interrupt-cells = <2>;

	};

arch/arm64/boot/dts/exynos/exynos5433-tm2.dts

+80 −5
Original line number Diff line number Diff line
@@ -23,6 +23,9 @@ 
	compatible = "samsung,tm2", "samsung,exynos5433";



	aliases {

		gsc0 = &gsc_0;

		gsc1 = &gsc_1;

		gsc2 = &gsc_2;

		pinctrl0 = &pinctrl_alive;

		pinctrl1 = &pinctrl_aud;

		pinctrl2 = &pinctrl_cpif;
@@ -42,6 +45,8 @@ 
		spi2 = &spi_2;

		spi3 = &spi_3;

		spi4 = &spi_4;

		mshc0 = &mshc_0;

		mshc2 = &mshc_2;

	};



	chosen {
@@ -158,6 +163,57 @@ 
	};

};



&cmu_aud {

	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;

	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;

};



&cmu_fsys {

	assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,

		<&cmu_top CLK_MOUT_SCLK_USBHOST30>,

		<&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,

		<&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,

		<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,

		<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,

		<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,

		<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,

		<&cmu_top CLK_DIV_SCLK_USBDRD30>,

		<&cmu_top CLK_DIV_SCLK_USBHOST30>;

	assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,

		<&cmu_top CLK_MOUT_BUS_PLL_USER>,

		<&cmu_top CLK_SCLK_USBDRD30_FSYS>,

		<&cmu_top CLK_SCLK_USBHOST30_FSYS>,

		<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,

		<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,

		<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,

		<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;

	assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,

			       <66700000>, <66700000>;

};



&cmu_gscl {

	assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,

			  <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;

	assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,

				 <&cmu_top CLK_ACLK_GSCL_333>;

};



&cmu_mfc {

	assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;

	assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;

};



&cmu_mscl {

	assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,

			  <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,

			  <&cmu_mscl CLK_MOUT_SCLK_JPEG>,

			  <&cmu_top CLK_MOUT_SCLK_JPEG_A>;

	assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,

				 <&cmu_top CLK_SCLK_JPEG_MSCL>,

				 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,

				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;

};



&cpu0 {

	cpu-supply = <&buck3_reg>;

};
@@ -645,6 +701,9 @@ 
&mshc_0 {

	status = "okay";

	num-slots = <1>;

	mmc-hs200-1_8v;

	mmc-hs400-1_8v;

	cap-mmc-highspeed;

	non-removable;

	card-detect-delay = <200>;

	samsung,dw-mshc-ciu-div = <3>;
@@ -661,6 +720,23 @@ 
	assigned-clock-rates = <800000000>;

};



&mshc_2 {

	status = "okay";

	num-slots = <1>;

	cap-sd-highspeed;

	disable-wp;

	cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;

	cd-inverted;

	card-detect-delay = <200>;

	samsung,dw-mshc-ciu-div = <3>;

	samsung,dw-mshc-sdr-timing = <0 4>;

	samsung,dw-mshc-ddr-timing = <0 2>;

	fifo-depth = <0x80>;

	pinctrl-names = "default";

	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;

	bus-width = <4>;

};



&pinctrl_alive {

	pinctrl-names = "default";

	pinctrl-0 = <&initial_alive>;
@@ -882,13 +958,12 @@ 
	};

};



&serial_1 {

	status = "okay";

&pmu_system_controller {

	assigned-clocks = <&pmu_system_controller 0>;

	assigned-clock-parents = <&xxti>;

};



&serial_3 {

	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;

	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;

&serial_1 {

	status = "okay";

};

arch/arm64/boot/dts/exynos/exynos5433.dtsi

+196 −90

File changed.

Preview size limit exceeded, changes collapsed.

arch/arm64/boot/dts/exynos/exynos7.dtsi

+14 −4
Original line number Diff line number Diff line
@@ -35,28 +35,28 @@ 
		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

		cpu_atlas0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a57", "arm,armv8";

			reg = <0x0>;

			enable-method = "psci";

		};



		cpu@1 {

		cpu_atlas1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a57", "arm,armv8";

			reg = <0x1>;

			enable-method = "psci";

		};



		cpu@2 {

		cpu_atlas2: cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a57", "arm,armv8";

			reg = <0x2>;

			enable-method = "psci";

		};



		cpu@3 {

		cpu_atlas3: cpu@3 {

			device_type = "cpu";

			compatible = "arm,cortex-a57", "arm,armv8";

			reg = <0x3>;
@@ -472,6 +472,16 @@ 
			status = "disabled";

		};



		arm-pmu {

			compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";

			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>,

					     <&cpu_atlas2>, <&cpu_atlas3>;

		};



		timer {

			compatible = "arm,armv8-timer";

			interrupts = <GIC_PPI 13