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Commit b2be40b7 authored by Adrian Hunter's avatar Adrian Hunter Committed by Greg Kroah-Hartman
Browse files

mmc: sdhci: Fix data command CRC error handling 



[ Upstream commit 4bf780996669280171c9cd58196512849b93434e ]

Existing data command CRC error handling is non-standard and does not work
with some Intel host controllers. Specifically, the assumption that the host
controller will continue operating normally after the error interrupt,
is not valid. Change the driver to handle the error in the same manner
as a data CRC error, taking care to ensure that the data line reset is
done for single or multi-block transfers, and it is done before
unmapping DMA.

Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent be608583

drivers/mmc/host/sdhci.c

+15 −25
Original line number Diff line number Diff line
@@ -1078,8 +1078,7 @@ static bool sdhci_needs_reset(struct sdhci_host *host, struct mmc_request *mrq) 
	return (!(host->flags & SDHCI_DEVICE_DEAD) &&

		((mrq->cmd && mrq->cmd->error) ||

		 (mrq->sbc && mrq->sbc->error) ||

		 (mrq->data && ((mrq->data->error && !mrq->data->stop) ||

				(mrq->data->stop && mrq->data->stop->error))) ||

		 (mrq->data && mrq->data->stop && mrq->data->stop->error) ||

		 (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)));

}
@@ -1131,6 +1130,16 @@ static void sdhci_finish_data(struct sdhci_host *host) 
	host->data = NULL;

	host->data_cmd = NULL;



	/*

	 * The controller needs a reset of internal state machines upon error

	 * conditions.

	 */

	if (data->error) {

		if (!host->cmd || host->cmd == data_cmd)

			sdhci_do_reset(host, SDHCI_RESET_CMD);

		sdhci_do_reset(host, SDHCI_RESET_DATA);

	}



	if ((host->flags & (SDHCI_REQ_USE_DMA | SDHCI_USE_ADMA)) ==

	    (SDHCI_REQ_USE_DMA | SDHCI_USE_ADMA))

		sdhci_adma_table_post(host, data);
@@ -1155,17 +1164,6 @@ static void sdhci_finish_data(struct sdhci_host *host) 
	if (data->stop &&

	    (data->error ||

	     !data->mrq->sbc)) {



		/*

		 * The controller needs a reset of internal state machines

		 * upon error conditions.

		 */

		if (data->error) {

			if (!host->cmd || host->cmd == data_cmd)

				sdhci_do_reset(host, SDHCI_RESET_CMD);

			sdhci_do_reset(host, SDHCI_RESET_DATA);

		}



		/*

		 * 'cap_cmd_during_tfr' request must not use the command line

		 * after mmc_command_done() has been called. It is upper layer's
@@ -2642,7 +2640,7 @@ static void sdhci_timeout_data_timer(struct timer_list *t) 
 *                                                                           *

\*****************************************************************************/



static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)

static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask, u32 *intmask_p)

{

	if (!host->cmd) {

		/*
@@ -2665,20 +2663,12 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) 
		else

			host->cmd->error = -EILSEQ;



		/*

		 * If this command initiates a data phase and a response

		 * CRC error is signalled, the card can start transferring

		 * data - the card may have received the command without

		 * error.  We must not terminate the mmc_request early.

		 *

		 * If the card did not receive the command or returned an

		 * error which prevented it sending data, the data phase

		 * will time out.

		 */

		/* Treat data command CRC error the same as data CRC error */

		if (host->cmd->data &&

		    (intmask & (SDHCI_INT_CRC | SDHCI_INT_TIMEOUT)) ==

		     SDHCI_INT_CRC) {

			host->cmd = NULL;

			*intmask_p |= SDHCI_INT_DATA_CRC;

			return;

		}
@@ -2906,7 +2896,7 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id) 
		}



		if (intmask & SDHCI_INT_CMD_MASK)

			sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);

			sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK, &intmask);



		if (intmask & SDHCI_INT_DATA_MASK)

			sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);