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Commit b2ac44fa authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman
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ARM: dts: r8a7779: Add SCIF fallback compatibility strings

parent 720e9096
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+12 −6
Original line number Diff line number Diff line
@@ -211,7 +211,8 @@
	};

	scif0: serial@ffe40000 {
		compatible = "renesas,scif-r8a7779", "renesas,scif";
		compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
			     "renesas,scif";
		reg = <0xffe40000 0x100>;
		interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp0_clks R8A7779_CLK_SCIF0>;
@@ -221,7 +222,8 @@
	};

	scif1: serial@ffe41000 {
		compatible = "renesas,scif-r8a7779", "renesas,scif";
		compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
			     "renesas,scif";
		reg = <0xffe41000 0x100>;
		interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp0_clks R8A7779_CLK_SCIF1>;
@@ -231,7 +233,8 @@
	};

	scif2: serial@ffe42000 {
		compatible = "renesas,scif-r8a7779", "renesas,scif";
		compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
			     "renesas,scif";
		reg = <0xffe42000 0x100>;
		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp0_clks R8A7779_CLK_SCIF2>;
@@ -241,7 +244,8 @@
	};

	scif3: serial@ffe43000 {
		compatible = "renesas,scif-r8a7779", "renesas,scif";
		compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
			     "renesas,scif";
		reg = <0xffe43000 0x100>;
		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp0_clks R8A7779_CLK_SCIF3>;
@@ -251,7 +255,8 @@
	};

	scif4: serial@ffe44000 {
		compatible = "renesas,scif-r8a7779", "renesas,scif";
		compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
			     "renesas,scif";
		reg = <0xffe44000 0x100>;
		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp0_clks R8A7779_CLK_SCIF4>;
@@ -261,7 +266,8 @@
	};

	scif5: serial@ffe45000 {
		compatible = "renesas,scif-r8a7779", "renesas,scif";
		compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
			     "renesas,scif";
		reg = <0xffe45000 0x100>;
		interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp0_clks R8A7779_CLK_SCIF5>;