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Commit b236fa1d authored by Felix Kuehling's avatar Felix Kuehling Committed by Oded Gabbay
Browse files

drm/amdgpu: Add helper to turn an existing VM into a compute VM 



v2: Removed updating and checking of vm->vm_context
v3: Enable amdgpu_vm_clear_bo in amdgpu_vm_make_compute

Signed-off-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
parent 3486625b

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

+67 −0
Original line number Original line Diff line number Diff line
@@ -2461,6 +2461,73 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, 
	return r;

	return r;

}

}





/**

 * amdgpu_vm_make_compute - Turn a GFX VM into a compute VM

 *

 * This only works on GFX VMs that don't have any BOs added and no

 * page tables allocated yet.

 *

 * Changes the following VM parameters:

 * - use_cpu_for_update

 * - pte_supports_ats

 * - pasid (old PASID is released, because compute manages its own PASIDs)

 *

 * Reinitializes the page directory to reflect the changed ATS

 * setting. May leave behind an unused shadow BO for the page

 * directory when switching from SDMA updates to CPU updates.

 *

 * Returns 0 for success, -errno for errors.

 */

int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm)

{

	bool pte_support_ats = (adev->asic_type == CHIP_RAVEN);

	int r;



	r = amdgpu_bo_reserve(vm->root.base.bo, true);

	if (r)

		return r;



	/* Sanity checks */

	if (!RB_EMPTY_ROOT(&vm->va.rb_root) || vm->root.entries) {

		r = -EINVAL;

		goto error;

	}



	/* Check if PD needs to be reinitialized and do it before

	 * changing any other state, in case it fails.

	 */

	if (pte_support_ats != vm->pte_support_ats) {

		r = amdgpu_vm_clear_bo(adev, vm, vm->root.base.bo,

			       adev->vm_manager.root_level,

			       pte_support_ats);

		if (r)

			goto error;

	}



	/* Update VM state */

	vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &

				    AMDGPU_VM_USE_CPU_FOR_COMPUTE);

	vm->pte_support_ats = pte_support_ats;

	DRM_DEBUG_DRIVER("VM update mode is %s\n",

			 vm->use_cpu_for_update ? "CPU" : "SDMA");

	WARN_ONCE((vm->use_cpu_for_update & !amdgpu_vm_is_large_bar(adev)),

		  "CPU update of VM recommended only for large BAR system\n");



	if (vm->pasid) {

		unsigned long flags;



		spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags);

		idr_remove(&adev->vm_manager.pasid_idr, vm->pasid);

		spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);



		vm->pasid = 0;

	}



error:

	amdgpu_bo_unreserve(vm->root.base.bo);

	return r;

}



/**

/**

 * amdgpu_vm_free_levels - free PD/PT levels

 * amdgpu_vm_free_levels - free PD/PT levels

 *

 *

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -260,6 +260,7 @@ void amdgpu_vm_manager_init(struct amdgpu_device *adev); 
void amdgpu_vm_manager_fini(struct amdgpu_device *adev);

void amdgpu_vm_manager_fini(struct amdgpu_device *adev);

int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,

int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,

		   int vm_context, unsigned int pasid);

		   int vm_context, unsigned int pasid);

int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm);

void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);

void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);

bool amdgpu_vm_pasid_fault_credit(struct amdgpu_device *adev,

bool amdgpu_vm_pasid_fault_credit(struct amdgpu_device *adev,

				  unsigned int pasid);

				  unsigned int pasid);