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Commit b1bc0236 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Retain GMU Log write pointer across slumber"

parents c16a1ee5 4e4bf3d8

drivers/gpu/msm/a6xx_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -967,6 +967,7 @@ 
#define A6XX_GMU_RPMH_HYST_CTRL			0x1F8E9

#define A6XX_GPU_GMU_CX_GMU_RPMH_POWER_STATE    0x1F8EC

#define A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_MSG      0x1F900

#define A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_RESP     0x1F901

#define A6XX_GMU_BOOT_KMD_LM_HANDSHAKE		0x1F9F0

#define A6XX_GMU_LLM_GLM_SLEEP_CTRL		0x1F957

#define A6XX_GMU_LLM_GLM_SLEEP_STATUS		0x1F958

drivers/gpu/msm/adreno_a6xx_gmu.c

+7 −0
Original line number Diff line number Diff line
@@ -325,6 +325,10 @@ static int a6xx_gmu_start(struct kgsl_device *device) 


	kgsl_regwrite(device, A6XX_GMU_CX_GMU_WFI_CONFIG, 0x0);



	/* Set the log wptr index */

	gmu_core_regwrite(device, A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_RESP,

			gmu->log_wptr_retention);



	/* Bring GMU out of reset */

	gmu_core_regwrite(device, A6XX_GMU_CM3_SYSRESET, 0);

	if (timed_poll_check(device,
@@ -423,6 +427,9 @@ static int a6xx_rpmh_power_off_gpu(struct kgsl_device *device) 
	/* Make sure M3 is in reset before going on */

	wmb();



	gmu_core_regread(device, A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_RESP,

			&gmu->log_wptr_retention);



	/* RSC sleep sequence is different on v1 */

	if (adreno_is_a630v1(adreno_dev))

		gmu_core_regwrite(device, A6XX_RSCC_TIMESTAMP_UNIT1_EN_DRV0 +

drivers/gpu/msm/kgsl_gmu.h

+2 −0
Original line number Diff line number Diff line
@@ -172,6 +172,7 @@ struct kgsl_mailbox { 
 * @idle_level: Minimal GPU idle power level

 * @fault_count: GMU fault count

 * @mailbox: Messages to AOP for ACD enable/disable go through this

 * @log_wptr_retention: Store the log wptr offset on slumber

 */

struct gmu_device {

	struct {
@@ -214,6 +215,7 @@ struct gmu_device { 
	struct gmu_memdesc kmem_entries[GMU_KERNEL_ENTRIES];

	unsigned long kmem_bitmap;

	const struct gmu_vma_entry *vma;

	unsigned int log_wptr_retention;

};



struct gmu_memdesc *gmu_get_memdesc(struct gmu_device *gmu,