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Commit b1a5da8e authored by Richard Zhao's avatar Richard Zhao Committed by Shawn Guo
Browse files

ARM: dts: imx6q-sabrelite: add ssi device 



Signed-off-by: default avatarRichard Zhao <richard.zhao@linaro.org>
Signed-off-by: default avatarRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 551fd208

arch/arm/boot/dts/imx6q-sabrelite.dts

+5 −0
Original line number Diff line number Diff line
@@ -35,6 +35,11 @@ 
						reg = <0>;

					};

				};



				ssi1: ssi@02028000 {

					fsl,mode = "i2s-slave";

					status = "okay";

				};

			};



		};

arch/arm/boot/dts/imx6q.dtsi

+15 −3
Original line number Diff line number Diff line
@@ -177,19 +177,31 @@ 
					interrupts = <0 51 0x04>;

				};



				ssi@02028000 { /* SSI1 */

				ssi1: ssi@02028000 {

					compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";

					reg = <0x02028000 0x4000>;

					interrupts = <0 46 0x04>;

					fsl,fifo-depth = <15>;

					fsl,ssi-dma-events = <38 37>;

					status = "disabled";

				};



				ssi@0202c000 { /* SSI2 */

				ssi2: ssi@0202c000 {

					compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";

					reg = <0x0202c000 0x4000>;

					interrupts = <0 47 0x04>;

					fsl,fifo-depth = <15>;

					fsl,ssi-dma-events = <42 41>;

					status = "disabled";

				};



				ssi@02030000 { /* SSI3 */

				ssi3: ssi@02030000 {

					compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";

					reg = <0x02030000 0x4000>;

					interrupts = <0 48 0x04>;

					fsl,fifo-depth = <15>;

					fsl,ssi-dma-events = <46 45>;

					status = "disabled";

				};



				asrc@02034000 {