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Commit b153cbc5 authored by Michael Chan's avatar Michael Chan Committed by David S. Miller
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bnxt_en: Fix IRQ coalescing regression. 



Recent IRQ coalescing clean up has removed a guard-rail for the max DMA
buffer coalescing value.  This is a 6-bit value and must not be 0.  We
already have a check for 0 but 64 is equivalent to 0 and will cause
non-stop interrupts.  Fix it by adding the proper check.

Fixes: f8503969 ("bnxt_en: Refactor and simplify coalescing code.")
Reported-by: default avatarAndy Gospodarek <gospo@broadcom.com>
Signed-off-by: default avatarMichael Chan <michael.chan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent de4a10ef

drivers/net/ethernet/broadcom/bnxt/bnxt.c

+5 −1
Original line number Diff line number Diff line
@@ -4548,9 +4548,13 @@ static void bnxt_hwrm_set_coal_params(struct bnxt_coal *hw_coal, 


	val = clamp_t(u16, hw_coal->coal_bufs, 1, max);

	req->num_cmpl_aggr_int = cpu_to_le16(val);



	/* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */

	val = min_t(u16, val, 63);

	req->num_cmpl_dma_aggr = cpu_to_le16(val);



	val = clamp_t(u16, hw_coal->coal_bufs_irq, 1, max);

	/* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */

	val = clamp_t(u16, hw_coal->coal_bufs_irq, 1, 63);

	req->num_cmpl_dma_aggr_during_int = cpu_to_le16(val);



	tmr = BNXT_USEC_TO_COAL_TIMER(hw_coal->coal_ticks);