Loading arch/powerpc/boot/dts/canyonlands.dts +8 −0 Original line number Diff line number Diff line Loading @@ -163,6 +163,14 @@ interrupts = <0x1e 4>; }; SATA0: sata@bffd1000 { compatible = "amcc,sata-460ex"; reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>; interrupt-parent = <&UIC3>; interrupts = <0x0 0x4 /* SATA */ 0x5 0x4>; /* AHBDMA */ }; POB0: opb { compatible = "ibm,opb-460ex", "ibm,opb"; #address-cells = <1>; Loading arch/powerpc/kernel/cputable.c +0 −1 Original line number Diff line number Diff line Loading @@ -1826,7 +1826,6 @@ static struct cpu_spec __initdata cpu_specs[] = { .cpu_features = CPU_FTRS_47X, .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, .cpu_user_features = COMMON_USER_BOOKE, .mmu_features = MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, .icache_bsize = 32, Loading arch/powerpc/kernel/head_44x.S +4 −0 Original line number Diff line number Diff line Loading @@ -113,6 +113,10 @@ _ENTRY(_start); stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */ stw r6, 0(r5) /* Clear the Machine Check Syndrome Register */ li r0,0 mtspr SPRN_MCSR,r0 /* Let's move on */ lis r4,start_kernel@h ori r4,r4,start_kernel@l Loading arch/powerpc/kernel/irq.c +9 −7 Original line number Diff line number Diff line Loading @@ -67,6 +67,7 @@ #include <asm/machdep.h> #include <asm/udbg.h> #include <asm/dbell.h> #include <asm/smp.h> #ifdef CONFIG_PPC64 #include <asm/paca.h> Loading Loading @@ -446,22 +447,23 @@ struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; void exc_lvl_ctx_init(void) { struct thread_info *tp; int i; int i, hw_cpu; for_each_possible_cpu(i) { memset((void *)critirq_ctx[i], 0, THREAD_SIZE); tp = critirq_ctx[i]; hw_cpu = get_hard_smp_processor_id(i); memset((void *)critirq_ctx[hw_cpu], 0, THREAD_SIZE); tp = critirq_ctx[hw_cpu]; tp->cpu = i; tp->preempt_count = 0; #ifdef CONFIG_BOOKE memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); tp = dbgirq_ctx[i]; memset((void *)dbgirq_ctx[hw_cpu], 0, THREAD_SIZE); tp = dbgirq_ctx[hw_cpu]; tp->cpu = i; tp->preempt_count = 0; memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); tp = mcheckirq_ctx[i]; memset((void *)mcheckirq_ctx[hw_cpu], 0, THREAD_SIZE); tp = mcheckirq_ctx[hw_cpu]; tp->cpu = i; tp->preempt_count = HARDIRQ_OFFSET; #endif Loading arch/powerpc/kernel/setup_32.c +5 −4 Original line number Diff line number Diff line Loading @@ -258,17 +258,18 @@ static void __init irqstack_early_init(void) #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) static void __init exc_lvl_early_init(void) { unsigned int i; unsigned int i, hw_cpu; /* interrupt stacks must be in lowmem, we get that for free on ppc32 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */ for_each_possible_cpu(i) { critirq_ctx[i] = (struct thread_info *) hw_cpu = get_hard_smp_processor_id(i); critirq_ctx[hw_cpu] = (struct thread_info *) __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); #ifdef CONFIG_BOOKE dbgirq_ctx[i] = (struct thread_info *) dbgirq_ctx[hw_cpu] = (struct thread_info *) __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); mcheckirq_ctx[i] = (struct thread_info *) mcheckirq_ctx[hw_cpu] = (struct thread_info *) __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); #endif } Loading Loading
arch/powerpc/boot/dts/canyonlands.dts +8 −0 Original line number Diff line number Diff line Loading @@ -163,6 +163,14 @@ interrupts = <0x1e 4>; }; SATA0: sata@bffd1000 { compatible = "amcc,sata-460ex"; reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>; interrupt-parent = <&UIC3>; interrupts = <0x0 0x4 /* SATA */ 0x5 0x4>; /* AHBDMA */ }; POB0: opb { compatible = "ibm,opb-460ex", "ibm,opb"; #address-cells = <1>; Loading
arch/powerpc/kernel/cputable.c +0 −1 Original line number Diff line number Diff line Loading @@ -1826,7 +1826,6 @@ static struct cpu_spec __initdata cpu_specs[] = { .cpu_features = CPU_FTRS_47X, .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, .cpu_user_features = COMMON_USER_BOOKE, .mmu_features = MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, .icache_bsize = 32, Loading
arch/powerpc/kernel/head_44x.S +4 −0 Original line number Diff line number Diff line Loading @@ -113,6 +113,10 @@ _ENTRY(_start); stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */ stw r6, 0(r5) /* Clear the Machine Check Syndrome Register */ li r0,0 mtspr SPRN_MCSR,r0 /* Let's move on */ lis r4,start_kernel@h ori r4,r4,start_kernel@l Loading
arch/powerpc/kernel/irq.c +9 −7 Original line number Diff line number Diff line Loading @@ -67,6 +67,7 @@ #include <asm/machdep.h> #include <asm/udbg.h> #include <asm/dbell.h> #include <asm/smp.h> #ifdef CONFIG_PPC64 #include <asm/paca.h> Loading Loading @@ -446,22 +447,23 @@ struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; void exc_lvl_ctx_init(void) { struct thread_info *tp; int i; int i, hw_cpu; for_each_possible_cpu(i) { memset((void *)critirq_ctx[i], 0, THREAD_SIZE); tp = critirq_ctx[i]; hw_cpu = get_hard_smp_processor_id(i); memset((void *)critirq_ctx[hw_cpu], 0, THREAD_SIZE); tp = critirq_ctx[hw_cpu]; tp->cpu = i; tp->preempt_count = 0; #ifdef CONFIG_BOOKE memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); tp = dbgirq_ctx[i]; memset((void *)dbgirq_ctx[hw_cpu], 0, THREAD_SIZE); tp = dbgirq_ctx[hw_cpu]; tp->cpu = i; tp->preempt_count = 0; memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); tp = mcheckirq_ctx[i]; memset((void *)mcheckirq_ctx[hw_cpu], 0, THREAD_SIZE); tp = mcheckirq_ctx[hw_cpu]; tp->cpu = i; tp->preempt_count = HARDIRQ_OFFSET; #endif Loading
arch/powerpc/kernel/setup_32.c +5 −4 Original line number Diff line number Diff line Loading @@ -258,17 +258,18 @@ static void __init irqstack_early_init(void) #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) static void __init exc_lvl_early_init(void) { unsigned int i; unsigned int i, hw_cpu; /* interrupt stacks must be in lowmem, we get that for free on ppc32 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */ for_each_possible_cpu(i) { critirq_ctx[i] = (struct thread_info *) hw_cpu = get_hard_smp_processor_id(i); critirq_ctx[hw_cpu] = (struct thread_info *) __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); #ifdef CONFIG_BOOKE dbgirq_ctx[i] = (struct thread_info *) dbgirq_ctx[hw_cpu] = (struct thread_info *) __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); mcheckirq_ctx[i] = (struct thread_info *) mcheckirq_ctx[hw_cpu] = (struct thread_info *) __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); #endif } Loading