Loading arch/arm64/boot/dts/qcom/kona.dtsi +6 −0 Original line number Diff line number Diff line Loading @@ -320,6 +320,12 @@ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; cache-controller@9200000 { compatible = "qcom,kona-llcc"; reg = <0x9200000 0x1d0000> , <0x9600000 0x50000>; reg-names = "llcc_base", "llcc_broadcast_base"; }; timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, Loading Loading
arch/arm64/boot/dts/qcom/kona.dtsi +6 −0 Original line number Diff line number Diff line Loading @@ -320,6 +320,12 @@ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; cache-controller@9200000 { compatible = "qcom,kona-llcc"; reg = <0x9200000 0x1d0000> , <0x9600000 0x50000>; reg-names = "llcc_base", "llcc_broadcast_base"; }; timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, Loading