disp: pll: Add support for 7nm C-PHY shadow clock

Add support for 7nm DSI PLL C-PHY shadow clocks, which
will be used during dynamic dsi clock switch.

Change-Id: Iac131b9085d5541434f8480c14e7de4c8d014d2e
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>