Commit b0aa44a3 authored Aug 13, 2014 by Aneesh Kumar K.V Committed by Benjamin Herrenschmidt Aug 13, 2014

powerpc/thp: Add write barrier after updating the valid bit



With hugepages, we store the hpte valid information in the pte page
whose address is stored in the second half of the PMD. Use a
write barrier to make sure clearing pmd busy bit and updating
hpte valid info are ordered properly.

CC: <stable@vger.kernel.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

parent 2fabf084

arch/powerpc/mm/hugepage-hash64.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -172,8 +172,11 @@ int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
		mark_hpte_slot_valid(hpte_slot_array, index, slot);
		}
		/*
		* No need to use ldarx/stdcx here
		* The hpte valid is stored in the pgtable whose address is in the
		* second half of the PMD. Order this against clearing of the busy bit in
		* huge pmd.
		*/
		smp_wmb();
		*pmdp = __pmd(new_pmd & ~_PAGE_BUSY);
		return 0;
		}