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Commit b0663cd4 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman
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ARM: dts: r8a7792: add MSIOF support 



Define the generic R8A7792 parts of the MSIOF0/1 device nodes.

Based  on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 5cef452b

arch/arm/boot/dts/r8a7792.dtsi

+30 −0
Original line number Diff line number Diff line
@@ -26,6 +26,8 @@ 
		i2c4 = &i2c4;

		i2c5 = &i2c5;

		spi0 = &qspi;

		spi1 = &msiof0;

		spi2 = &msiof1;

		vin0 = &vin0;

		vin1 = &vin1;

		vin2 = &vin2;
@@ -572,6 +574,34 @@ 
			status = "disabled";

		};



		msiof0: spi@e6e20000 {

			compatible = "renesas,msiof-r8a7792";

			reg = <0 0xe6e20000 0 0x0064>;

			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&mstp0_clks R8A7792_CLK_MSIOF0>;

			dmas = <&dmac0 0x51>, <&dmac0 0x52>,

			       <&dmac1 0x51>, <&dmac1 0x52>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		msiof1: spi@e6e10000 {

			compatible = "renesas,msiof-r8a7792";

			reg = <0 0xe6e10000 0 0x0064>;

			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&mstp2_clks R8A7792_CLK_MSIOF1>;

			dmas = <&dmac0 0x55>, <&dmac0 0x56>,

			       <&dmac1 0x55>, <&dmac1 0x56>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		du: display@feb00000 {

			compatible = "renesas,du-r8a7792";

			reg = <0 0xfeb00000 0 0x40000>;