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Commit b0412ea9 authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Michael Ellerman
Browse files

powerpc/mm: Drop pte-common.h from BOOK3S 64 



We copy only needed PTE bits define from pte-common.h to respective
hash related header. This should greatly simply later patches in which
we are going to change the pte format for hash config

Acked-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent ee4889c7

arch/powerpc/include/asm/book3s/64/hash-4k.h

+1 −0
Original line number Diff line number Diff line
@@ -62,6 +62,7 @@ 
/* shift to put page number into pte */

#define PTE_RPN_SHIFT	(17)



#define _PAGE_4K_PFN		0

#ifndef __ASSEMBLY__

/*

 * 4-level page tables related bits

arch/powerpc/include/asm/book3s/64/hash.h

+2 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
#define _PAGE_EXEC		0x0004 /* No execute on POWER4 and newer (we invert) */

#define _PAGE_GUARDED		0x0008

/* We can derive Memory coherence from _PAGE_NO_CACHE */

#define _PAGE_COHERENT		0x0

#define _PAGE_NO_CACHE		0x0020 /* I: cache inhibit */

#define _PAGE_WRITETHRU		0x0040 /* W: cache write-through */

#define _PAGE_DIRTY		0x0080 /* C: page changed */
@@ -30,6 +31,7 @@ 
/* No separate kernel read-only */

#define _PAGE_KERNEL_RW		(_PAGE_RW | _PAGE_DIRTY) /* user access blocked by key */

#define _PAGE_KERNEL_RO		 _PAGE_KERNEL_RW

#define _PAGE_KERNEL_RWX	(_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)



/* Strong Access Ordering */

#define _PAGE_SAO		(_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)

arch/powerpc/include/asm/book3s/64/pgtable.h

+101 −3
Original line number Diff line number Diff line
@@ -94,11 +94,109 @@ 
#define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS |		\

			 _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPLITTING | \

			 _PAGE_THP_HUGE)

#define _PTE_NONE_MASK	_PAGE_HPTEFLAGS

/*

 * Default defines for things which we don't use.

 * We should get this removed.

 * The mask convered by the RPN must be a ULL on 32-bit platforms with

 * 64-bit PTEs

 */

#include <asm/pte-common.h>

#define PTE_RPN_MASK	(~((1UL << PTE_RPN_SHIFT) - 1))

/*

 * _PAGE_CHG_MASK masks of bits that are to be preserved across

 * pgprot changes

 */

#define _PAGE_CHG_MASK	(PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \

			 _PAGE_ACCESSED | _PAGE_SPECIAL)

/*

 * Mask of bits returned by pte_pgprot()

 */

#define PAGE_PROT_BITS	(_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \

			 _PAGE_WRITETHRU | _PAGE_4K_PFN | \

			 _PAGE_USER | _PAGE_ACCESSED |  \

			 _PAGE_RW |  _PAGE_DIRTY | _PAGE_EXEC)

/*

 * We define 2 sets of base prot bits, one for basic pages (ie,

 * cacheable kernel and user pages) and one for non cacheable

 * pages. We always set _PAGE_COHERENT when SMP is enabled or

 * the processor might need it for DMA coherency.

 */

#define _PAGE_BASE_NC	(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)

#define _PAGE_BASE	(_PAGE_BASE_NC | _PAGE_COHERENT)



/* Permission masks used to generate the __P and __S table,

 *

 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h

 *

 * Write permissions imply read permissions for now (we could make write-only

 * pages on BookE but we don't bother for now). Execute permission control is

 * possible on platforms that define _PAGE_EXEC

 *

 * Note due to the way vm flags are laid out, the bits are XWR

 */

#define PAGE_NONE	__pgprot(_PAGE_BASE)

#define PAGE_SHARED	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)

#define PAGE_SHARED_X	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | \

				 _PAGE_EXEC)

#define PAGE_COPY	__pgprot(_PAGE_BASE | _PAGE_USER )

#define PAGE_COPY_X	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)

#define PAGE_READONLY	__pgprot(_PAGE_BASE | _PAGE_USER )

#define PAGE_READONLY_X	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)



#define __P000	PAGE_NONE

#define __P001	PAGE_READONLY

#define __P010	PAGE_COPY

#define __P011	PAGE_COPY

#define __P100	PAGE_READONLY_X

#define __P101	PAGE_READONLY_X

#define __P110	PAGE_COPY_X

#define __P111	PAGE_COPY_X



#define __S000	PAGE_NONE

#define __S001	PAGE_READONLY

#define __S010	PAGE_SHARED

#define __S011	PAGE_SHARED

#define __S100	PAGE_READONLY_X

#define __S101	PAGE_READONLY_X

#define __S110	PAGE_SHARED_X

#define __S111	PAGE_SHARED_X



/* Permission masks used for kernel mappings */

#define PAGE_KERNEL	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)

#define PAGE_KERNEL_NC	__pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \

				 _PAGE_NO_CACHE)

#define PAGE_KERNEL_NCG	__pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \

				 _PAGE_NO_CACHE | _PAGE_GUARDED)

#define PAGE_KERNEL_X	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)

#define PAGE_KERNEL_RO	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)

#define PAGE_KERNEL_ROX	__pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)



/* Protection used for kernel text. We want the debuggers to be able to

 * set breakpoints anywhere, so don't write protect the kernel text

 * on platforms where such control is possible.

 */

#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\

	defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)

#define PAGE_KERNEL_TEXT	PAGE_KERNEL_X

#else

#define PAGE_KERNEL_TEXT	PAGE_KERNEL_ROX

#endif



/* Make modules code happy. We don't set RO yet */

#define PAGE_KERNEL_EXEC	PAGE_KERNEL_X



/*

 * Don't just check for any non zero bits in __PAGE_USER, since for book3e

 * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in

 * _PAGE_USER.  Need to explicitly match _PAGE_BAP_UR bit in that case too.

 */

#define pte_user(val)		((val & _PAGE_USER) == _PAGE_USER)



/* Advertise special mapping type for AGP */

#define PAGE_AGP		(PAGE_KERNEL_NC)

#define HAVE_PAGE_AGP



/* Advertise support for _PAGE_SPECIAL */

#define __HAVE_ARCH_PTE_SPECIAL



#ifndef __ASSEMBLY__



/*

arch/powerpc/include/asm/book3s/pgtable.h

+7 −9
Original line number Diff line number Diff line
@@ -11,10 +11,7 @@ 
#ifndef __ASSEMBLY__



/* Generic accessors to PTE bits */

static inline int pte_write(pte_t pte)

{

	return (pte_val(pte) & (_PAGE_RW | _PAGE_RO)) != _PAGE_RO;

}

static inline int pte_write(pte_t pte)		{ return !!(pte_val(pte) & _PAGE_RW);}

static inline int pte_dirty(pte_t pte)		{ return pte_val(pte) & _PAGE_DIRTY; }

static inline int pte_young(pte_t pte)		{ return pte_val(pte) & _PAGE_ACCESSED; }

static inline int pte_special(pte_t pte)	{ return pte_val(pte) & _PAGE_SPECIAL; }
@@ -57,15 +54,16 @@ static inline unsigned long pte_pfn(pte_t pte) { 
	return pte_val(pte) >> PTE_RPN_SHIFT; }



/* Generic modifiers for PTE bits */

static inline pte_t pte_wrprotect(pte_t pte) {

	pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE);

	pte_val(pte) |= _PAGE_RO; return pte; }

static inline pte_t pte_wrprotect(pte_t pte)

{

	pte_val(pte) &= ~_PAGE_RW;

	return pte;

}

static inline pte_t pte_mkclean(pte_t pte) {

	pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }

	pte_val(pte) &= ~_PAGE_DIRTY; return pte; }

static inline pte_t pte_mkold(pte_t pte) {

	pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }

static inline pte_t pte_mkwrite(pte_t pte) {

	pte_val(pte) &= ~_PAGE_RO;

	pte_val(pte) |= _PAGE_RW; return pte; }

static inline pte_t pte_mkdirty(pte_t pte) {

	pte_val(pte) |= _PAGE_DIRTY; return pte; }