regulator: qpnp-amoled: Allow configure VREG_OK poll time in AOD entry

Currently, when entering AOD mode, poll time for AB VREG_OK is
set to 100 ms. Make it configurable through a DT property so that
it can be set based on the panel behavior.

Change-Id: I5ebb5bfacdc72639745c8b395348251dd01f5b72
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>