Loading msm/vidc/msm_venc.c +0 −20 Original line number Diff line number Diff line Loading @@ -1113,26 +1113,6 @@ u32 v4l2_to_hfi_flip(struct msm_vidc_inst *inst) return flip; } inline bool vidc_scalar_enabled(struct msm_vidc_inst *inst) { struct v4l2_format *f; u32 output_height, output_width, input_height, input_width; bool scalar_enable = false; f = &inst->fmts[OUTPUT_PORT].v4l2_fmt; output_height = f->fmt.pix_mp.height; output_width = f->fmt.pix_mp.width; f = &inst->fmts[INPUT_PORT].v4l2_fmt; input_height = f->fmt.pix_mp.height; input_width = f->fmt.pix_mp.width; if (output_height != input_height || output_width != input_width) scalar_enable = true; return scalar_enable; } static int msm_venc_set_csc(struct msm_vidc_inst *inst, u32 color_primaries, u32 custom_matrix); Loading msm/vidc/msm_vidc_buffer_calculations.c +47 −11 Original line number Diff line number Diff line Loading @@ -324,7 +324,8 @@ static inline u32 calculate_vp8e_scratch1_size(struct msm_vidc_inst *inst, u32 width, u32 height, u32 num_ref, bool ten_bit, u32 num_vpp_pipes); static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, u32 width, u32 height, u32 num_ref, bool ten_bit); u32 width, u32 height, u32 num_ref, bool ten_bit, bool downscale, u32 rotation_val, u32 flip); static inline u32 calculate_enc_persist_size(void); Loading Loading @@ -508,9 +509,10 @@ int msm_vidc_get_encoder_internal_buffer_sizes(struct msm_vidc_inst *inst) { struct msm_vidc_enc_buff_size_calculators *enc_calculators; u32 width, height, i, num_ref, num_vpp_pipes; bool is_tenbit = false; u32 rotation_val = 0, flip = 0; bool is_tenbit = false, is_downscale = false; int num_bframes; struct v4l2_ctrl *bframe; struct v4l2_ctrl *bframe, *rotation, *hflip, *vflip; struct v4l2_format *f; if (!inst || !inst->core || !inst->core->platform_data) { Loading @@ -537,18 +539,30 @@ int msm_vidc_get_encoder_internal_buffer_sizes(struct msm_vidc_inst *inst) return -EINVAL; } f = &inst->fmts[OUTPUT_PORT].v4l2_fmt; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; bframe = get_ctrl(inst, V4L2_CID_MPEG_VIDEO_B_FRAMES); num_bframes = bframe->val; if (num_bframes < 0) { s_vpr_e(inst->sid, "%s: get num bframe failed\n", __func__); return -EINVAL; } f = &inst->fmts[OUTPUT_PORT].v4l2_fmt; rotation = get_ctrl(inst, V4L2_CID_ROTATE); rotation_val = rotation->val; if (rotation_val == 90 || rotation_val == 270) { /* Internal buffer size calc are based on rotated wxh */ width = f->fmt.pix_mp.height; height = f->fmt.pix_mp.width; } else { width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; } hflip = get_ctrl(inst, V4L2_CID_HFLIP); vflip = get_ctrl(inst, V4L2_CID_VFLIP); flip = hflip->val | vflip->val; num_ref = msm_vidc_get_num_ref_frames(inst); is_tenbit = (inst->bit_depth == MSM_VIDC_BIT_DEPTH_10); is_downscale = vidc_scalar_enabled(inst); for (i = 0; i < HAL_BUFFER_MAX; i++) { struct hal_buffer_requirements *curr_req; Loading @@ -574,7 +588,8 @@ int msm_vidc_get_encoder_internal_buffer_sizes(struct msm_vidc_inst *inst) curr_req->buffer_size = enc_calculators->calculate_scratch2_size( inst, width, height, num_ref, is_tenbit); is_tenbit, is_downscale, rotation_val, flip); valid_buffer_type = true; } else if (curr_req->buffer_type == HAL_BUFFER_INTERNAL_PERSIST) { Loading Loading @@ -1809,8 +1824,8 @@ static inline u32 hfi_ubwc_uv_metadata_plane_bufheight(u32 height, tile_height_pels), metadata_height_multi); } static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, u32 width, u32 height, u32 num_ref, bool ten_bit) static inline u32 hfi_iris2_enc_dpb_buffer_size(u32 width, u32 height, bool ten_bit) { u32 aligned_width, aligned_height, chroma_height, ref_buf_height; u32 luma_size, chroma_size; Loading @@ -1835,7 +1850,6 @@ static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, metadata_stride, meta_buf_height); size = (aligned_height + chroma_height) * aligned_width + meta_size_y + meta_size_c; size = (size * (num_ref + 2)) + 4096; } else { ref_buf_height = (height + (HFI_VENUS_HEIGHT_ALIGNMENT - 1)) & (~(HFI_VENUS_HEIGHT_ALIGNMENT - 1)); Loading Loading @@ -1868,7 +1882,29 @@ static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, meta_size_c = hfi_ubwc_metadata_plane_buffer_size( metadata_stride, meta_buf_height); size = ref_buf_size + meta_size_y + meta_size_c; size = (size * (num_ref+3)) + 4096; } return size; } static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, u32 width, u32 height, u32 num_ref, bool ten_bit, bool downscale, u32 rotation_val, u32 flip) { u32 size; size = hfi_iris2_enc_dpb_buffer_size(width, height, ten_bit); size = size * (num_ref + 1) + 4096; if (downscale && (rotation_val || flip)) { /* VPSS output is always 128 x 32 aligned for 8-bit * and 192 x 16 aligned for 10-bit */ if (rotation_val == 90 || rotation_val == 270) size += hfi_iris2_enc_dpb_buffer_size(height, width, ten_bit); else size += hfi_iris2_enc_dpb_buffer_size(width, height, ten_bit); size += 4096; } return size; } Loading msm/vidc/msm_vidc_buffer_calculations.h +2 −1 Original line number Diff line number Diff line Loading @@ -26,7 +26,8 @@ struct msm_vidc_enc_buff_size_calculators { u32 width, u32 height, u32 num_ref, bool ten_bit, u32 num_vpp_pipes); u32 (*calculate_scratch2_size)(struct msm_vidc_inst *inst, u32 width, u32 height, u32 num_ref, bool ten_bit); u32 width, u32 height, u32 num_ref, bool ten_bit, bool downscale, u32 rotation_val, u32 flip); u32 (*calculate_persist_size)(void); }; Loading msm/vidc/msm_vidc_common.c +19 −0 Original line number Diff line number Diff line Loading @@ -693,6 +693,25 @@ enum multi_stream msm_comm_get_stream_output_mode(struct msm_vidc_inst *inst) return HAL_VIDEO_DECODER_PRIMARY; } bool vidc_scalar_enabled(struct msm_vidc_inst *inst) { struct v4l2_format *f; u32 output_height, output_width, input_height, input_width; bool scalar_enable = false; f = &inst->fmts[OUTPUT_PORT].v4l2_fmt; output_height = f->fmt.pix_mp.height; output_width = f->fmt.pix_mp.width; f = &inst->fmts[INPUT_PORT].v4l2_fmt; input_height = f->fmt.pix_mp.height; input_width = f->fmt.pix_mp.width; if (output_height != input_height || output_width != input_width) scalar_enable = true; return scalar_enable; } bool is_single_session(struct msm_vidc_inst *inst, u32 ignore_flags) { bool single = true; Loading msm/vidc/msm_vidc_common.h +1 −0 Original line number Diff line number Diff line Loading @@ -223,6 +223,7 @@ static inline bool is_valid_operating_rate(struct msm_vidc_inst *inst, s32 val) return true; } bool vidc_scalar_enabled(struct msm_vidc_inst *inst); bool is_single_session(struct msm_vidc_inst *inst, u32 ignore_flags); int msm_comm_get_num_perf_sessions(struct msm_vidc_inst *inst); bool is_batching_allowed(struct msm_vidc_inst *inst); Loading Loading
msm/vidc/msm_venc.c +0 −20 Original line number Diff line number Diff line Loading @@ -1113,26 +1113,6 @@ u32 v4l2_to_hfi_flip(struct msm_vidc_inst *inst) return flip; } inline bool vidc_scalar_enabled(struct msm_vidc_inst *inst) { struct v4l2_format *f; u32 output_height, output_width, input_height, input_width; bool scalar_enable = false; f = &inst->fmts[OUTPUT_PORT].v4l2_fmt; output_height = f->fmt.pix_mp.height; output_width = f->fmt.pix_mp.width; f = &inst->fmts[INPUT_PORT].v4l2_fmt; input_height = f->fmt.pix_mp.height; input_width = f->fmt.pix_mp.width; if (output_height != input_height || output_width != input_width) scalar_enable = true; return scalar_enable; } static int msm_venc_set_csc(struct msm_vidc_inst *inst, u32 color_primaries, u32 custom_matrix); Loading
msm/vidc/msm_vidc_buffer_calculations.c +47 −11 Original line number Diff line number Diff line Loading @@ -324,7 +324,8 @@ static inline u32 calculate_vp8e_scratch1_size(struct msm_vidc_inst *inst, u32 width, u32 height, u32 num_ref, bool ten_bit, u32 num_vpp_pipes); static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, u32 width, u32 height, u32 num_ref, bool ten_bit); u32 width, u32 height, u32 num_ref, bool ten_bit, bool downscale, u32 rotation_val, u32 flip); static inline u32 calculate_enc_persist_size(void); Loading Loading @@ -508,9 +509,10 @@ int msm_vidc_get_encoder_internal_buffer_sizes(struct msm_vidc_inst *inst) { struct msm_vidc_enc_buff_size_calculators *enc_calculators; u32 width, height, i, num_ref, num_vpp_pipes; bool is_tenbit = false; u32 rotation_val = 0, flip = 0; bool is_tenbit = false, is_downscale = false; int num_bframes; struct v4l2_ctrl *bframe; struct v4l2_ctrl *bframe, *rotation, *hflip, *vflip; struct v4l2_format *f; if (!inst || !inst->core || !inst->core->platform_data) { Loading @@ -537,18 +539,30 @@ int msm_vidc_get_encoder_internal_buffer_sizes(struct msm_vidc_inst *inst) return -EINVAL; } f = &inst->fmts[OUTPUT_PORT].v4l2_fmt; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; bframe = get_ctrl(inst, V4L2_CID_MPEG_VIDEO_B_FRAMES); num_bframes = bframe->val; if (num_bframes < 0) { s_vpr_e(inst->sid, "%s: get num bframe failed\n", __func__); return -EINVAL; } f = &inst->fmts[OUTPUT_PORT].v4l2_fmt; rotation = get_ctrl(inst, V4L2_CID_ROTATE); rotation_val = rotation->val; if (rotation_val == 90 || rotation_val == 270) { /* Internal buffer size calc are based on rotated wxh */ width = f->fmt.pix_mp.height; height = f->fmt.pix_mp.width; } else { width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; } hflip = get_ctrl(inst, V4L2_CID_HFLIP); vflip = get_ctrl(inst, V4L2_CID_VFLIP); flip = hflip->val | vflip->val; num_ref = msm_vidc_get_num_ref_frames(inst); is_tenbit = (inst->bit_depth == MSM_VIDC_BIT_DEPTH_10); is_downscale = vidc_scalar_enabled(inst); for (i = 0; i < HAL_BUFFER_MAX; i++) { struct hal_buffer_requirements *curr_req; Loading @@ -574,7 +588,8 @@ int msm_vidc_get_encoder_internal_buffer_sizes(struct msm_vidc_inst *inst) curr_req->buffer_size = enc_calculators->calculate_scratch2_size( inst, width, height, num_ref, is_tenbit); is_tenbit, is_downscale, rotation_val, flip); valid_buffer_type = true; } else if (curr_req->buffer_type == HAL_BUFFER_INTERNAL_PERSIST) { Loading Loading @@ -1809,8 +1824,8 @@ static inline u32 hfi_ubwc_uv_metadata_plane_bufheight(u32 height, tile_height_pels), metadata_height_multi); } static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, u32 width, u32 height, u32 num_ref, bool ten_bit) static inline u32 hfi_iris2_enc_dpb_buffer_size(u32 width, u32 height, bool ten_bit) { u32 aligned_width, aligned_height, chroma_height, ref_buf_height; u32 luma_size, chroma_size; Loading @@ -1835,7 +1850,6 @@ static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, metadata_stride, meta_buf_height); size = (aligned_height + chroma_height) * aligned_width + meta_size_y + meta_size_c; size = (size * (num_ref + 2)) + 4096; } else { ref_buf_height = (height + (HFI_VENUS_HEIGHT_ALIGNMENT - 1)) & (~(HFI_VENUS_HEIGHT_ALIGNMENT - 1)); Loading Loading @@ -1868,7 +1882,29 @@ static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, meta_size_c = hfi_ubwc_metadata_plane_buffer_size( metadata_stride, meta_buf_height); size = ref_buf_size + meta_size_y + meta_size_c; size = (size * (num_ref+3)) + 4096; } return size; } static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, u32 width, u32 height, u32 num_ref, bool ten_bit, bool downscale, u32 rotation_val, u32 flip) { u32 size; size = hfi_iris2_enc_dpb_buffer_size(width, height, ten_bit); size = size * (num_ref + 1) + 4096; if (downscale && (rotation_val || flip)) { /* VPSS output is always 128 x 32 aligned for 8-bit * and 192 x 16 aligned for 10-bit */ if (rotation_val == 90 || rotation_val == 270) size += hfi_iris2_enc_dpb_buffer_size(height, width, ten_bit); else size += hfi_iris2_enc_dpb_buffer_size(width, height, ten_bit); size += 4096; } return size; } Loading
msm/vidc/msm_vidc_buffer_calculations.h +2 −1 Original line number Diff line number Diff line Loading @@ -26,7 +26,8 @@ struct msm_vidc_enc_buff_size_calculators { u32 width, u32 height, u32 num_ref, bool ten_bit, u32 num_vpp_pipes); u32 (*calculate_scratch2_size)(struct msm_vidc_inst *inst, u32 width, u32 height, u32 num_ref, bool ten_bit); u32 width, u32 height, u32 num_ref, bool ten_bit, bool downscale, u32 rotation_val, u32 flip); u32 (*calculate_persist_size)(void); }; Loading
msm/vidc/msm_vidc_common.c +19 −0 Original line number Diff line number Diff line Loading @@ -693,6 +693,25 @@ enum multi_stream msm_comm_get_stream_output_mode(struct msm_vidc_inst *inst) return HAL_VIDEO_DECODER_PRIMARY; } bool vidc_scalar_enabled(struct msm_vidc_inst *inst) { struct v4l2_format *f; u32 output_height, output_width, input_height, input_width; bool scalar_enable = false; f = &inst->fmts[OUTPUT_PORT].v4l2_fmt; output_height = f->fmt.pix_mp.height; output_width = f->fmt.pix_mp.width; f = &inst->fmts[INPUT_PORT].v4l2_fmt; input_height = f->fmt.pix_mp.height; input_width = f->fmt.pix_mp.width; if (output_height != input_height || output_width != input_width) scalar_enable = true; return scalar_enable; } bool is_single_session(struct msm_vidc_inst *inst, u32 ignore_flags) { bool single = true; Loading
msm/vidc/msm_vidc_common.h +1 −0 Original line number Diff line number Diff line Loading @@ -223,6 +223,7 @@ static inline bool is_valid_operating_rate(struct msm_vidc_inst *inst, s32 val) return true; } bool vidc_scalar_enabled(struct msm_vidc_inst *inst); bool is_single_session(struct msm_vidc_inst *inst, u32 ignore_flags); int msm_comm_get_num_perf_sessions(struct msm_vidc_inst *inst); bool is_batching_allowed(struct msm_vidc_inst *inst); Loading