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Commit ad0376eb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'edac_for_4.11_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp 

Pull EDAC updates from Borislav Petkov:
 "A new EDAC driver for the Pondicherry2 memory controller IP found in
  the Intel Apollo Lake platform and the Denverton microserver.

  Plus small fixlets.

  Normally I had this queued for 4.12 but Tony requested for the
  pnd2_edac driver to possibly land in 4.11 therefore I'm sending it to
  you now.

  It is a driver for new hardware which people don't have yet so it
  shouldn't cause any regressions.

  The couple of patches ontop of it show that Qiuxu actually did test it
  on the hardware he has access to :)"

* tag 'edac_for_4.11_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  EDAC, pnd2_edac: Fix reported DIMM number
  EDAC, pnd2_edac: Fix !EDAC_DEBUG build
  EDAC: Select DEBUG_FS
  EDAC, pnd2_edac: Add new EDAC driver for Intel SoC platforms
  EDAC, i5000, i5400: Fix use of MTR_DRAM_WIDTH macro
  EDAC, xgene: Fix wrongly spelled "procesing"
parents 85f91d5c 819f60fb

MAINTAINERS

+6 −0
Original line number Diff line number Diff line
@@ -4775,6 +4775,12 @@ L: linux-edac@vger.kernel.org 
S:	Maintained

F:	drivers/edac/mpc85xx_edac.[ch]



EDAC-PND2

M:	Tony Luck <tony.luck@intel.com>

L:	linux-edac@vger.kernel.org

S:	Maintained

F:	drivers/edac/pnd2_edac.[ch]



EDAC-PASEMI

M:	Egor Martovetsky <egor@pasemi.com>

L:	linux-edac@vger.kernel.org

drivers/edac/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ config EDAC_LEGACY_SYSFS 


config EDAC_DEBUG

	bool "Debugging"

	select DEBUG_FS

	help

	  This turns on debugging information for the entire EDAC subsystem.

	  You do so by inserting edac_module with "edac_debug_level=x." Valid
@@ -259,6 +260,15 @@ config EDAC_SKX 
	  Support for error detection and correction the Intel

	  Skylake server Integrated Memory Controllers.



config EDAC_PND2

	tristate "Intel Pondicherry2"

	depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL

	help

	  Support for error detection and correction on the Intel

	  Pondicherry2 Integrated Memory Controller. This SoC IP is

	  first used on the Apollo Lake platform and Denverton

	  micro-server but may appear on others in the future.



config EDAC_MPC85XX

	tristate "Freescale MPC83xx / MPC85xx"

	depends on EDAC_MM_EDAC && FSL_SOC

drivers/edac/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ obj-$(CONFIG_EDAC_I7300) += i7300_edac.o 
obj-$(CONFIG_EDAC_I7CORE)		+= i7core_edac.o

obj-$(CONFIG_EDAC_SBRIDGE)		+= sb_edac.o

obj-$(CONFIG_EDAC_SKX)			+= skx_edac.o

obj-$(CONFIG_EDAC_PND2)			+= pnd2_edac.o

obj-$(CONFIG_EDAC_E7XXX)		+= e7xxx_edac.o

obj-$(CONFIG_EDAC_E752X)		+= e752x_edac.o

obj-$(CONFIG_EDAC_I82443BXGX)		+= i82443bxgx_edac.o

drivers/edac/i5000_edac.c

+1 −1
Original line number Diff line number Diff line
@@ -1293,7 +1293,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) 
			dimm->mtype = MEM_FB_DDR2;



			/* ask what device type on this row */

			if (MTR_DRAM_WIDTH(mtr))

			if (MTR_DRAM_WIDTH(mtr) == 8)

				dimm->dtype = DEV_X8;

			else

				dimm->dtype = DEV_X4;

drivers/edac/i5400_edac.c

+3 −2
Original line number Diff line number Diff line
@@ -1207,13 +1207,14 @@ static int i5400_init_dimms(struct mem_ctl_info *mci) 


			dimm->nr_pages = size_mb << 8;

			dimm->grain = 8;

			dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4;

			dimm->dtype = MTR_DRAM_WIDTH(mtr) == 8 ?

				      DEV_X8 : DEV_X4;

			dimm->mtype = MEM_FB_DDR2;

			/*

			 * The eccc mechanism is SDDC (aka SECC), with

			 * is similar to Chipkill.

			 */

			dimm->edac_mode = MTR_DRAM_WIDTH(mtr) ?

			dimm->edac_mode = MTR_DRAM_WIDTH(mtr) == 8 ?

					  EDAC_S8ECD8ED : EDAC_S4ECD4ED;

			ndimms++;

		}