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Commit ac5b0ea3 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

Merge tag 'omap-devel-f-for-3.6' of... 

Merge tag 'omap-devel-f-for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into cleanup-part2

Miscellaneous OMAP clock, hwmod, clockdomain, and powerdomain patches
for 3.6.  Mostly small infrastructure improvements, and preparation
for OMAP5 and AM33xx code.

Conflicts:
	arch/arm/mach-omap2/omap_hwmod.c
	arch/arm/plat-omap/include/plat/omap_hwmod.h
parents 3f96a2d9 8cb8de5d

arch/arm/mach-omap2/clockdomain44xx.c

+7 −3
Original line number Diff line number Diff line
@@ -70,7 +70,7 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm) 


static int omap4_clkdm_sleep(struct clockdomain *clkdm)

{

	omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition,

	omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,

					clkdm->cm_inst, clkdm->clkdm_offs);

	return 0;

}
@@ -90,8 +90,12 @@ static void omap4_clkdm_allow_idle(struct clockdomain *clkdm) 


static void omap4_clkdm_deny_idle(struct clockdomain *clkdm)

{

	if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)

		omap4_clkdm_wakeup(clkdm);

	else

		omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,

					clkdm->cm_inst, clkdm->clkdm_offs);

						 clkdm->cm_inst,

						 clkdm->clkdm_offs);

}



static int omap4_clkdm_clk_enable(struct clockdomain *clkdm)

arch/arm/mach-omap2/cminst44xx.c

+0 −14
Original line number Diff line number Diff line
@@ -234,20 +234,6 @@ void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs) 
	_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs);

}



/**

 * omap4_cminst_clkdm_force_sleep - try to put a clockdomain into idle

 * @part: PRCM partition ID that the clockdomain registers exist in

 * @inst: CM instance register offset (*_INST macro)

 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)

 *

 * Put a clockdomain referred to by (@part, @inst, @cdoffs) into idle

 * No return value.

 */

void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs)

{

	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);

}



/**

 * omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle

 * @part: PRCM partition ID that the clockdomain registers exist in

arch/arm/mach-omap2/cminst44xx.h

+0 −25
Original line number Diff line number Diff line
@@ -16,38 +16,13 @@ extern void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs); 
extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs);

extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs);

extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs);



extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);



# ifdef CONFIG_ARCH_OMAP4

extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,

					 u16 clkctrl_offs);



extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,

				       u16 clkctrl_offs);

extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,

					u16 clkctrl_offs);



# else



static inline int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,

					u16 clkctrl_offs)

{

	return 0;

}



static inline void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,

				s16 cdoffs, u16 clkctrl_offs)

{

}



static inline void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,

				 u16 clkctrl_offs)

{

}



# endif



/*

 * In an ideal world, we would not export these low-level functions,

 * but this will probably take some time to fix properly

arch/arm/mach-omap2/control.h

+1 −0
Original line number Diff line number Diff line
@@ -188,6 +188,7 @@ 
#define OMAP3630_CONTROL_FUSE_OPP120_VDD1       (OMAP2_CONTROL_GENERAL + 0x0120)

#define OMAP3630_CONTROL_FUSE_OPP50_VDD2        (OMAP2_CONTROL_GENERAL + 0x0128)

#define OMAP3630_CONTROL_FUSE_OPP100_VDD2       (OMAP2_CONTROL_GENERAL + 0x012C)

#define OMAP3630_CONTROL_CAMERA_PHY_CTRL	(OMAP2_CONTROL_GENERAL + 0x02f0)



/* OMAP44xx control efuse offsets */

#define OMAP44XX_CONTROL_FUSE_IVA_OPP50		0x22C

arch/arm/mach-omap2/dpll3xxx.c

+11 −1
Original line number Diff line number Diff line
@@ -135,11 +135,20 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n) 
 */

static int _omap3_noncore_dpll_lock(struct clk *clk)

{

	const struct dpll_data *dd;

	u8 ai;

	int r;

	u8 state = 1;

	int r = 0;



	pr_debug("clock: locking DPLL %s\n", clk->name);



	dd = clk->dpll_data;

	state <<= __ffs(dd->idlest_mask);



	/* Check if already locked */

	if ((__raw_readl(dd->idlest_reg) & dd->idlest_mask) == state)

		goto done;



	ai = omap3_dpll_autoidle_read(clk);



	if (ai)
@@ -152,6 +161,7 @@ static int _omap3_noncore_dpll_lock(struct clk *clk) 
	if (ai)

		omap3_dpll_allow_idle(clk);



done:

	return r;

}