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Commit abd8926b authored by Liav Rehana's avatar Liav Rehana Committed by Vineet Gupta
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ARC: [plat-eznps] Update the init sequence of aux regs per cpu.



This commit add new configuration that enables us to distinguish
between building the kernel for platforms that have a different set
of auxiliary registers for each cpu and platforms that have a shared
set of auxiliary registers across every thread in each core.
On platforms that implement a different set of auxiliary registers
disabling this configuration insures that we initialize registers on
every cpu and not just for the first thread of the core.
Example for non shared registers is working with EZsim (non silicon)

Signed-off-by: default avatarLiav Rehana <liavr@mellanox.com>
Signed-off-by: default avatarNoam Camus <noamca@mellanox.com>
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 35b55ef2
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