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Commit ab677ff4 authored by Hariprasad Shenai's avatar Hariprasad Shenai Committed by David S. Miller
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cxgb4: Allocate Tx queues dynamically



Allocate resources dynamically for Upper layer driver's (ULD) like
cxgbit, iw_cxgb4, cxgb4i and chcr. The resources allocated include Tx
queues which are allocated when ULD register with cxgb4 driver and freed
while un-registering. The Tx queues which are shared by ULD shall be
allocated by first registering driver and un-allocated by last
unregistering driver.

Signed-off-by: default avatarAtul Gupta <atul.gupta@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c816061d
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+9 −7
Original line number Diff line number Diff line
@@ -592,16 +592,18 @@ static int chcr_aes_cbc_setkey(struct crypto_ablkcipher *tfm, const u8 *key,

static int cxgb4_is_crypto_q_full(struct net_device *dev, unsigned int idx)
{
	int ret = 0;
	struct sge_ofld_txq *q;
	struct adapter *adap = netdev2adap(dev);
	struct sge_uld_txq_info *txq_info =
		adap->sge.uld_txq_info[CXGB4_TX_CRYPTO];
	struct sge_uld_txq *txq;
	int ret = 0;

	local_bh_disable();
	q = &adap->sge.ofldtxq[idx];
	spin_lock(&q->sendq.lock);
	if (q->full)
	txq = &txq_info->uldtxq[idx];
	spin_lock(&txq->sendq.lock);
	if (txq->full)
		ret = -1;
	spin_unlock(&q->sendq.lock);
	spin_unlock(&txq->sendq.lock);
	local_bh_enable();
	return ret;
}
@@ -674,11 +676,11 @@ static int chcr_device_init(struct chcr_context *ctx)
		}
		u_ctx = ULD_CTX(ctx);
		rxq_perchan = u_ctx->lldi.nrxq / u_ctx->lldi.nchan;
		ctx->dev->tx_channel_id = 0;
		rxq_idx = ctx->dev->tx_channel_id * rxq_perchan;
		rxq_idx += id % rxq_perchan;
		spin_lock(&ctx->dev->lock_chcr_dev);
		ctx->tx_channel_id = rxq_idx;
		ctx->dev->tx_channel_id = !ctx->dev->tx_channel_id;
		spin_unlock(&ctx->dev->lock_chcr_dev);
	}
out:
+2 −1
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ static chcr_handler_func work_handlers[NUM_CPL_CMDS] = {
static struct cxgb4_uld_info chcr_uld_info = {
	.name = DRV_MODULE_NAME,
	.nrxq = MAX_ULD_QSETS,
	.ntxq = MAX_ULD_QSETS,
	.rxq_size = 1024,
	.add = chcr_uld_add,
	.state_change = chcr_uld_state_change,
@@ -126,7 +127,7 @@ static int cpl_fw6_pld_handler(struct chcr_dev *dev,

int chcr_send_wr(struct sk_buff *skb)
{
	return cxgb4_ofld_send(skb->dev, skb);
	return cxgb4_crypto_send(skb->dev, skb);
}

static void *chcr_uld_add(const struct cxgb4_lld_info *lld)
+1 −0
Original line number Diff line number Diff line
@@ -1481,6 +1481,7 @@ static int c4iw_uld_control(void *handle, enum cxgb4_control control, ...)
static struct cxgb4_uld_info c4iw_uld_info = {
	.name = DRV_NAME,
	.nrxq = MAX_ULD_QSETS,
	.ntxq = MAX_ULD_QSETS,
	.rxq_size = 511,
	.ciq = true,
	.lro = false,
+15 −4
Original line number Diff line number Diff line
@@ -635,6 +635,7 @@ struct tx_sw_desc;

struct sge_txq {
	unsigned int  in_use;       /* # of in-use Tx descriptors */
	unsigned int  q_type;	    /* Q type Eth/Ctrl/Ofld */
	unsigned int  size;         /* # of descriptors */
	unsigned int  cidx;         /* SW consumer index */
	unsigned int  pidx;         /* producer index */
@@ -665,7 +666,7 @@ struct sge_eth_txq { /* state for an SGE Ethernet Tx queue */
	unsigned long mapping_err;  /* # of I/O MMU packet mapping errors */
} ____cacheline_aligned_in_smp;

struct sge_ofld_txq {               /* state for an SGE offload Tx queue */
struct sge_uld_txq {               /* state for an SGE offload Tx queue */
	struct sge_txq q;
	struct adapter *adap;
	struct sk_buff_head sendq;  /* list of backpressured packets */
@@ -693,14 +694,20 @@ struct sge_uld_rxq_info {
	u8 uld;			/* uld type */
};

struct sge_uld_txq_info {
	struct sge_uld_txq *uldtxq; /* Txq's for ULD */
	atomic_t users;		/* num users */
	u16 ntxq;		/* # of egress uld queues */
};

struct sge {
	struct sge_eth_txq ethtxq[MAX_ETH_QSETS];
	struct sge_ofld_txq ofldtxq[MAX_OFLD_QSETS];
	struct sge_ctrl_txq ctrlq[MAX_CTRL_QUEUES];

	struct sge_eth_rxq ethrxq[MAX_ETH_QSETS];
	struct sge_rspq fw_evtq ____cacheline_aligned_in_smp;
	struct sge_uld_rxq_info **uld_rxq_info;
	struct sge_uld_txq_info **uld_txq_info;

	struct sge_rspq intrq ____cacheline_aligned_in_smp;
	spinlock_t intrq_lock;
@@ -1298,8 +1305,9 @@ int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq,
			  unsigned int cmplqid);
int t4_sge_mod_ctrl_txq(struct adapter *adap, unsigned int eqid,
			unsigned int cmplqid);
int t4_sge_alloc_ofld_txq(struct adapter *adap, struct sge_ofld_txq *txq,
			  struct net_device *dev, unsigned int iqid);
int t4_sge_alloc_uld_txq(struct adapter *adap, struct sge_uld_txq *txq,
			 struct net_device *dev, unsigned int iqid,
			 unsigned int uld_type);
irqreturn_t t4_sge_intr_msix(int irq, void *cookie);
int t4_sge_init(struct adapter *adap);
void t4_sge_start(struct adapter *adap);
@@ -1661,4 +1669,7 @@ int t4_uld_mem_alloc(struct adapter *adap);
void t4_uld_clean_up(struct adapter *adap);
void t4_register_netevent_notifier(void);
void free_rspq_fl(struct adapter *adap, struct sge_rspq *rq, struct sge_fl *fl);
void free_tx_desc(struct adapter *adap, struct sge_txq *q,
		  unsigned int n, bool unmap);
void free_txq(struct adapter *adap, struct sge_txq *q);
#endif /* __CXGB4_H__ */
+0 −12
Original line number Diff line number Diff line
@@ -2512,18 +2512,6 @@ do { \
		RL("FLLow:", fl.low);
		RL("FLStarving:", fl.starving);

	} else if (ofld_idx < ofld_entries) {
		const struct sge_ofld_txq *tx =
			&adap->sge.ofldtxq[ofld_idx * 4];
		int n = min(4, adap->sge.ofldqsets - 4 * ofld_idx);

		S("QType:", "OFLD-Txq");
		T("TxQ ID:", q.cntxt_id);
		T("TxQ size:", q.size);
		T("TxQ inuse:", q.in_use);
		T("TxQ CIDX:", q.cidx);
		T("TxQ PIDX:", q.pidx);

	} else if (ctrl_idx < ctrl_entries) {
		const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
		int n = min(4, adap->params.nports - 4 * ctrl_idx);
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