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Commit aae8224d authored by Eric Miao's avatar Eric Miao
Browse files

ARM: pxa: introduce pxa3xx_clock_sysclass for clock suspend/resume 



Signed-off-by: default avatarHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: default avatarEric Miao <eric.y.miao@gmail.com>
parent f113fe4e

arch/arm/mach-pxa/clock-pxa2xx.c

+8 −0
Original line number Original line Diff line number Diff line
@@ -54,3 +54,11 @@ struct sysdev_class pxa2xx_clock_sysclass = { 
	.suspend	= pxa2xx_clock_suspend,

	.suspend	= pxa2xx_clock_suspend,

	.resume		= pxa2xx_clock_resume,

	.resume		= pxa2xx_clock_resume,

};

};



static int __init pxa2xx_clock_init(void)

{

	if (cpu_is_pxa2xx())

		return sysdev_class_register(&pxa2xx_clock_sysclass);

	return 0;

}

postcore_initcall(pxa2xx_clock_init);

arch/arm/mach-pxa/clock-pxa3xx.c

+38 −0
Original line number Original line Diff line number Diff line
@@ -159,3 +159,41 @@ const struct clkops clk_pxa3xx_pout_ops = { 
	.enable		= clk_pout_enable,

	.enable		= clk_pout_enable,

	.disable	= clk_pout_disable,

	.disable	= clk_pout_disable,

};

};



#ifdef CONFIG_PM

static uint32_t cken[2];

static uint32_t accr;



static int pxa3xx_clock_suspend(struct sys_device *d, pm_message_t state)

{

	cken[0] = CKENA;

	cken[1] = CKENB;

	accr = ACCR;

	return 0;

}



static int pxa3xx_clock_resume(struct sys_device *d)

{

	ACCR = accr;

	CKENA = cken[0];

	CKENB = cken[1];

	return 0;

}

#else

#define pxa3xx_clock_suspend	NULL

#define pxa3xx_clock_resume	NULL

#endif



struct sysdev_class pxa3xx_clock_sysclass = {

	.name		= "pxa3xx-clock",

	.suspend	= pxa3xx_clock_suspend,

	.resume		= pxa3xx_clock_resume,

};



static int __init pxa3xx_clock_init(void)

{

	if (cpu_is_pxa3xx())

		return sysdev_class_register(&pxa3xx_clock_sysclass);

	return 0;

}

postcore_initcall(pxa3xx_clock_init);

arch/arm/mach-pxa/clock.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -72,4 +72,6 @@ extern const struct clkops clk_pxa3xx_pout_ops; 




extern void clk_pxa3xx_cken_enable(struct clk *);

extern void clk_pxa3xx_cken_enable(struct clk *);

extern void clk_pxa3xx_cken_disable(struct clk *);

extern void clk_pxa3xx_cken_disable(struct clk *);



extern struct sysdev_class pxa3xx_clock_sysclass;

#endif
 
#endif

arch/arm/mach-pxa/pxa3xx.c

+3 −28
Original line number Original line Diff line number Diff line
@@ -103,30 +103,6 @@ static struct clk_lookup pxa3xx_clkregs[] = { 
static void __iomem *sram;

static void __iomem *sram;

static unsigned long wakeup_src;

static unsigned long wakeup_src;





#define SAVE(x)		sleep_save[SLEEP_SAVE_##x] = x

#define RESTORE(x)	x = sleep_save[SLEEP_SAVE_##x]



enum {	SLEEP_SAVE_CKENA,

	SLEEP_SAVE_CKENB,

	SLEEP_SAVE_ACCR,



	SLEEP_SAVE_COUNT,

};



static void pxa3xx_cpu_pm_save(unsigned long *sleep_save)

{

	SAVE(CKENA);

	SAVE(CKENB);

	SAVE(ACCR);

}



static void pxa3xx_cpu_pm_restore(unsigned long *sleep_save)

{

	RESTORE(ACCR);

	RESTORE(CKENA);

	RESTORE(CKENB);

}



/*

/*

 * Enter a standby mode (S0D1C2 or S0D2C2).  Upon wakeup, the dynamic

 * Enter a standby mode (S0D1C2 or S0D2C2).  Upon wakeup, the dynamic

 * memory controller has to be reinitialised, so we place some code

 * memory controller has to be reinitialised, so we place some code
@@ -225,9 +201,6 @@ static int pxa3xx_cpu_pm_valid(suspend_state_t state) 
}

}





static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = {

static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = {

	.save_count	= SLEEP_SAVE_COUNT,

	.save		= pxa3xx_cpu_pm_save,

	.restore	= pxa3xx_cpu_pm_restore,

	.valid		= pxa3xx_cpu_pm_valid,

	.valid		= pxa3xx_cpu_pm_valid,

	.enter		= pxa3xx_cpu_pm_enter,

	.enter		= pxa3xx_cpu_pm_enter,

};

};
@@ -466,7 +439,9 @@ static struct sys_device pxa3xx_sysdev[] = { 
		.cls	= &pxa3xx_mfp_sysclass,

		.cls	= &pxa3xx_mfp_sysclass,

	}, {

	}, {

		.cls	= &pxa_gpio_sysclass,

		.cls	= &pxa_gpio_sysclass,

	},

	}, {

		.cls	= &pxa3xx_clock_sysclass,

	}

};

};





static int __init pxa3xx_init(void)

static int __init pxa3xx_init(void)