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Commit a9b22038 authored by Naveen Yadav's avatar Naveen Yadav
Browse files

clk: qcom: npucc-kona: Enable safe config and HW_CTL for all RCGs 



Enable the HW_CTL bit on RCGs in order to safely reconfigure and
update the RCG in the event that it's enabled from some other
hardware signal.

Change-Id: I4f049869c2a2911d186528c0937e8f6f518d3be2
Signed-off-by: default avatarNaveen Yadav <naveenky@codeaurora.org>
parent 5294afaf

drivers/clk/qcom/npucc-kona.c

+7 −0
Original line number Diff line number Diff line
@@ -298,6 +298,7 @@ static struct clk_rcg2 npu_cc_cal_hm1_clk_src = { 
	.parent_map = npu_cc_parent_map_0_crc,

	.freq_tbl = ftbl_npu_cc_cal_hm0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "npu_cc_cal_hm1_clk_src",

		.parent_names = npu_cc_parent_names_0_crc,
@@ -323,6 +324,7 @@ static struct clk_rcg2 npu_cc_cal_hm0_clk_src = { 
	.parent_map = npu_cc_parent_map_0_crc,

	.freq_tbl = ftbl_npu_cc_cal_hm0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr = {

		.hw.init = &(struct clk_init_data){

			.name = "npu_cc_cal_hm0_clk_src",
@@ -366,6 +368,7 @@ static struct clk_rcg2 npu_cc_core_clk_src = { 
	.parent_map = npu_cc_parent_map_0,

	.freq_tbl = ftbl_npu_cc_core_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "npu_cc_core_clk_src",

		.parent_names = npu_cc_parent_names_0,
@@ -399,6 +402,8 @@ static struct clk_rcg2 npu_cc_lmh_clk_src = { 
	.hid_width = 5,

	.parent_map = npu_cc_parent_map_0,

	.freq_tbl = ftbl_npu_cc_lmh_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "npu_cc_lmh_clk_src",

		.parent_names = npu_cc_parent_names_0,
@@ -451,6 +456,8 @@ static struct clk_rcg2 npu_dsp_core_clk_src = { 
	.hid_width = 5,

	.parent_map = npu_cc_parent_map_2,

	.freq_tbl = ftbl_npu_dsp_core_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "npu_dsp_core_clk_src",

		.parent_names = npu_cc_parent_names_2,