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Commit a97051f4 authored by Ganesh Goudar's avatar Ganesh Goudar Committed by David S. Miller
Browse files

cxgb4: fix incorrect cim_la output for T6 



take care of UpDbgLaRdPtr[0-3] restriction for T6.

Signed-off-by: default avatarGanesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 91a09e0c

drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

+10 −1
Original line number Diff line number Diff line
@@ -8312,7 +8312,16 @@ int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr) 
		ret = t4_cim_read(adap, UP_UP_DBG_LA_DATA_A, 1, &la_buf[i]);

		if (ret)

			break;

		idx = (idx + 1) & UPDBGLARDPTR_M;



		/* Bits 0-3 of UpDbgLaRdPtr can be between 0000 to 1001 to

		 * identify the 32-bit portion of the full 312-bit data

		 */

		if (is_t6(adap->params.chip) && (idx & 0xf) >= 9)

			idx = (idx & 0xff0) + 0x10;

		else

			idx++;

		/* address can't exceed 0xfff */

		idx &= UPDBGLARDPTR_M;

	}

restart:

	if (cfg & UPDBGLAEN_F) {