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Commit a921e2a3 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'stmmac' 



Vince Bridgers says:

====================
net: stmmac: Correct socfpga init/exit and

This patch series adds platform specific init/exit code so that socfpga
suspend/resume works as expected, and corrects a minor issue detected by
cppcheck.

V2: Address review comments by adding a line break at end of function and
    structure declaration. Add another trivial cppcheck patch.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 48bc0343 c8df8ce3

drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c

+69 −0
Original line number Diff line number Diff line
@@ -20,7 +20,9 @@ 
#include <linux/of_net.h>

#include <linux/phy.h>

#include <linux/regmap.h>

#include <linux/reset.h>

#include <linux/stmmac.h>

#include "stmmac.h"



#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0

#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1
@@ -34,6 +36,7 @@ struct socfpga_dwmac { 
	u32	reg_shift;

	struct	device *dev;

	struct regmap *sys_mgr_base_addr;

	struct reset_control *stmmac_rst;

};



static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *dev)
@@ -43,6 +46,13 @@ static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device * 
	u32 reg_offset, reg_shift;

	int ret;



	dwmac->stmmac_rst = devm_reset_control_get(dev,

						  STMMAC_RESOURCE_NAME);

	if (IS_ERR(dwmac->stmmac_rst)) {

		dev_info(dev, "Could not get reset control!\n");

		return -EINVAL;

	}



	dwmac->interface = of_get_phy_mode(np);



	sys_mgr_base_addr = syscon_regmap_lookup_by_phandle(np, "altr,sysmgr-syscon");
@@ -125,6 +135,65 @@ static void *socfpga_dwmac_probe(struct platform_device *pdev) 
	return dwmac;

}



static void socfpga_dwmac_exit(struct platform_device *pdev, void *priv)

{

	struct socfpga_dwmac	*dwmac = priv;



	/* On socfpga platform exit, assert and hold reset to the

	 * enet controller - the default state after a hard reset.

	 */

	if (dwmac->stmmac_rst)

		reset_control_assert(dwmac->stmmac_rst);

}



static int socfpga_dwmac_init(struct platform_device *pdev, void *priv)

{

	struct socfpga_dwmac	*dwmac = priv;

	struct net_device *ndev = platform_get_drvdata(pdev);

	struct stmmac_priv *stpriv = NULL;

	int ret = 0;



	if (ndev)

		stpriv = netdev_priv(ndev);



	/* Assert reset to the enet controller before changing the phy mode */

	if (dwmac->stmmac_rst)

		reset_control_assert(dwmac->stmmac_rst);



	/* Setup the phy mode in the system manager registers according to

	 * devicetree configuration

	 */

	ret = socfpga_dwmac_setup(dwmac);



	/* Deassert reset for the phy configuration to be sampled by

	 * the enet controller, and operation to start in requested mode

	 */

	if (dwmac->stmmac_rst)

		reset_control_deassert(dwmac->stmmac_rst);



	/* Before the enet controller is suspended, the phy is suspended.

	 * This causes the phy clock to be gated. The enet controller is

	 * resumed before the phy, so the clock is still gated "off" when

	 * the enet controller is resumed. This code makes sure the phy

	 * is "resumed" before reinitializing the enet controller since

	 * the enet controller depends on an active phy clock to complete

	 * a DMA reset. A DMA reset will "time out" if executed

	 * with no phy clock input on the Synopsys enet controller.

	 * Verified through Synopsys Case #8000711656.

	 *

	 * Note that the phy clock is also gated when the phy is isolated.

	 * Phy "suspend" and "isolate" controls are located in phy basic

	 * control register 0, and can be modified by the phy driver

	 * framework.

	 */

	if (stpriv && stpriv->phydev)

		phy_resume(stpriv->phydev);



	return ret;

}



const struct stmmac_of_data socfpga_gmac_data = {

	.setup = socfpga_dwmac_probe,

	.init = socfpga_dwmac_init,

	.exit = socfpga_dwmac_exit,

};

drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c

+1 −4
Original line number Diff line number Diff line
@@ -320,11 +320,8 @@ static void dwmac1000_set_eee_timer(void __iomem *ioaddr, int ls, int tw) 


static void dwmac1000_ctrl_ane(void __iomem *ioaddr, bool restart)

{

	u32 value;



	value = readl(ioaddr + GMAC_AN_CTRL);

	/* auto negotiation enable and External Loopback enable */

	value = GMAC_AN_CTRL_ANE | GMAC_AN_CTRL_ELE;

	u32 value = GMAC_AN_CTRL_ANE | GMAC_AN_CTRL_ELE;



	if (restart)

		value |= GMAC_AN_CTRL_RAN;

drivers/net/ethernet/stmicro/stmmac/enh_desc.c

+1 −1
Original line number Diff line number Diff line
@@ -145,7 +145,7 @@ static void enh_desc_get_ext_status(void *data, struct stmmac_extra_stats *x, 
			x->rx_msg_type_delay_req++;

		else if (p->des4.erx.msg_type == RDES_EXT_DELAY_RESP)

			x->rx_msg_type_delay_resp++;

		else if (p->des4.erx.msg_type == RDES_EXT_DELAY_REQ)

		else if (p->des4.erx.msg_type == RDES_EXT_PDELAY_REQ)

			x->rx_msg_type_pdelay_req++;

		else if (p->des4.erx.msg_type == RDES_EXT_PDELAY_RESP)

			x->rx_msg_type_pdelay_resp++;

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

+4 −0
Original line number Diff line number Diff line
@@ -2878,6 +2878,10 @@ int stmmac_suspend(struct net_device *ndev) 
		clk_disable_unprepare(priv->stmmac_clk);

	}

	spin_unlock_irqrestore(&priv->lock, flags);



	priv->oldlink = 0;

	priv->speed = 0;

	priv->oldduplex = -1;

	return 0;

}