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Commit a90c4d4f authored by Amandeep Virk's avatar Amandeep Virk Committed by Gerrit - the friendly Code Review server
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ARM: dts: qcom: Add spcom scsr in kona device tree 

Add spcom scsr register address and bitmask in kona device tree
that is written to by spcom kernel to indicate to Secure
Processor that it is being restarted as part of subsystem
restart. This is needed to support an FR for supporting
loading of Secure Processor in UEFI stage.

Change-Id: I5ff1469a7be519855e34b9d5168a641669edc0d8
parent 099aa2a0

bindings/arm/msm/spcom.txt

+15 −0
Original line number Diff line number Diff line
@@ -3,9 +3,24 @@ Qualcomm Technologies, Inc. Secure Proccessor Communication (spcom) 
Required properties:

-compatible : should be "qcom,spcom"

-qcom,spcom-ch-names: predefined channels name string

-qcom,spcom-sp2soc-rmb-reg-addr: Secure Processor to SOC shared

                                 register physical address

-qcom,spcom-sp2soc-rmb-initdone-bit: bit indicating Secure

                                     Processor init-done

-qcom,spcom-sp2soc-rmb-pbldone-bit: bit indicating Secure

                                    Processor bootloader-done

-qcom,spcom-soc2sp-rmb-reg-addr: SOC to Secure Processor shared

                                 register physical address

-qcom,spcom-soc2sp-rmb-sp-ssr-bit: bit indicating Secure

                                   Processor subsystem reset



Example:

    qcom,spcom {

            compatible = "qcom,spcom";

            qcom,spcom-ch-names = "sp_kernel" , "sp_ssr";

            qcom,spcom-sp2soc-rmb-reg-addr = <0x01881020>;

            qcom,spcom-sp2soc-rmb-initdone-bit = <24>;

            qcom,spcom-sp2soc-rmb-pbldone-bit = <25>;

            qcom,spcom-soc2sp-rmb-reg-addr = <0x01881030>;

            qcom,spcom-soc2sp-rmb-sp-ssr-bit = <0>;

    };

qcom/kona.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -3439,6 +3439,9 @@ 
		qcom,spcom-sp2soc-rmb-reg-addr = <0x01881020>;

		qcom,spcom-sp2soc-rmb-initdone-bit = <24>;

		qcom,spcom-sp2soc-rmb-pbldone-bit = <25>;

		/* soc2sp rmb shared register physical address */

		qcom,spcom-soc2sp-rmb-reg-addr = <0x01881030>;

		qcom,spcom-soc2sp-rmb-sp-ssr-bit = <0>;

		status = "ok";

	};