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Commit a8d68290 authored by Thomas Gleixner's avatar Thomas Gleixner
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x86: prevent C-states hang on AMD C1E enabled machines 



Impact: System hang when AMD C1E machines switch into C2/C3

AMD C1E enabled systems do not work with normal ACPI C-states 
even if the BIOS is advertising them. Limit the C-states to 
C1 for the ACPI processor idle code.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 27ce4cb4

arch/x86/kernel/process.c

+1 −0
Original line number Diff line number Diff line
@@ -272,6 +272,7 @@ static void c1e_idle(void) 
			c1e_detected = 1;

			mark_tsc_unstable("TSC halt in C1E");

			printk(KERN_INFO "System has C1E enabled\n");

			set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);

		}

	}

include/asm-x86/acpi.h

+2 −0
Original line number Diff line number Diff line
@@ -140,6 +140,8 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate) 
	    boot_cpu_data.x86_model <= 0x05 &&

	    boot_cpu_data.x86_mask < 0x0A)

		return 1;

	else if (boot_cpu_has(X86_FEATURE_AMDC1E))

		return 1;

	else

		return max_cstate;

}

include/asm-x86/cpufeature.h

+1 −0
Original line number Diff line number Diff line
@@ -81,6 +81,7 @@ 
#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */

#define X86_FEATURE_11AP	(3*32+19) /* Bad local APIC aka 11AP */

#define X86_FEATURE_NOPL	(3*32+20) /* The NOPL (0F 1F) instructions */

#define X86_FEATURE_AMDC1E	(3*32+21) /* AMD C1E detected */



/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */

#define X86_FEATURE_XMM3	(4*32+ 0) /* Streaming SIMD Extensions-3 */