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Commit a82d4437 authored by David Dai's avatar David Dai Committed by Gerrit - the friendly Code Review server
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dt-bindings: clock: remove measure_only clocks



Remove number space for measure only dummy clocks that are never
referenced by consumers.

Change-Id: I807f58c65e9cc3dd1341a8f4ebe4a732e94304a1
Signed-off-by: default avatarDavid Dai <daidavid1@codeaurora.org>
parent 43eef15a
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+0 −5
Original line number Diff line number Diff line
@@ -6,11 +6,6 @@
#ifndef _DT_BINDINGS_CLK_QCOM_GCC_KONA_H
#define _DT_BINDINGS_CLK_QCOM_GCC_KONA_H

/* Dummy clocks for rate measurement */
#define MEASURE_ONLY_CNOC_CLK					0
#define MEASURE_ONLY_IPA_2X_CLK					1
#define MEASURE_ONLY_SNOC_CLK					2

/* GCC clocks */
#define GCC_AGGRE_NOC_PCIE_TBU_CLK				3
#define GCC_AGGRE_UFS_CARD_AXI_CLK				4
+1 −5
Original line number Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
 */

#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_KONA_H
@@ -33,8 +33,4 @@
#define GPUCC_GPU_CC_GX_BCR					4
#define GPUCC_GPU_CC_XO_BCR					5

#define MEASURE_ONLY_GPU_CC_CX_GFX3D_CLK			0
#define MEASURE_ONLY_GPU_CC_CX_GFX3D_SLV_CLK			1
#define MEASURE_ONLY_GPU_CC_GX_GFX3D_CLK			2

#endif
+15 −19
Original line number Diff line number Diff line
@@ -4,24 +4,20 @@
#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_LITO_H
#define _DT_BINDINGS_CLK_QCOM_GPU_CC_LITO_H

#define MEASURE_ONLY_GPU_CC_CX_GFX3D_CLK			0
#define MEASURE_ONLY_GPU_CC_CX_GFX3D_SLV_CLK			1
#define MEASURE_ONLY_GPU_CC_GX_GFX3D_CLK			2
#define GPU_CC_PLL1						3
#define GPU_CC_CX_GMU_CLK					4
#define GPU_CC_CX_SNOC_DVM_CLK					5
#define GPU_CC_CXO_AON_CLK					6
#define GPU_CC_CXO_CLK						7
#define GPU_CC_GMU_CLK_SRC					8
#define GPU_CC_GX_CXO_CLK					9
#define GPU_CC_GX_GMU_CLK					10
#define GPU_CC_GX_VSENSE_CLK					11
#define GPU_CC_AHB_CLK						12
#define GPU_CC_CRC_AHB_CLK					13
#define GPU_CC_CX_APB_CLK					14
#define GPU_CC_RBCPR_AHB_CLK					15
#define GPU_CC_RBCPR_CLK					16
#define GPU_CC_RBCPR_CLK_SRC					17
#define GPU_CC_SLEEP_CLK					18
/* GPU_CC clocks */
#define GPU_CC_AHB_CLK						0
#define GPU_CC_CRC_AHB_CLK					1
#define GPU_CC_CX_APB_CLK					2
#define GPU_CC_CX_GMU_CLK					3
#define GPU_CC_CX_SNOC_DVM_CLK					4
#define GPU_CC_CXO_AON_CLK					5
#define GPU_CC_CXO_CLK						6
#define GPU_CC_GMU_CLK_SRC					7
#define GPU_CC_GX_GMU_CLK					8
#define GPU_CC_GX_VSENSE_CLK					9
#define GPU_CC_PLL1						10
#define GPU_CC_RBCPR_CLK					11
#define GPU_CC_RBCPR_CLK_SRC					12
#define GPU_CC_SLEEP_CLK					13

#endif