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Commit a81a6c65 authored by Linus Walleij's avatar Linus Walleij Committed by Grant Likely
Browse files

ARM: dt: fix up PL011 device tree bindings 



Make the map match the reality, the current binding text is
nonsense:

- The clock required for the clocking of the serial port
  must come first and is not optional (as the driver will
  otherwise proceed to grab and use the apb_pclk as uartclk),
  and the apb_pclk that clocks the logic must come second
  as the code will retrieve the first clock by index,
  whereas the PrimeCell but will explicitly look for
  "apb_pclk" so this can be specified later, as it is
  looked up by name.

- The pin control state "default" is the only mandated
  state, the sleep state is entirely optional.

We also add an example to avoid further confusion.

Reported-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarGrant Likely <grant.likely@linaro.org>
parent e99010ed

Documentation/devicetree/bindings/serial/pl011.txt

+25 −3
Original line number Diff line number Diff line
@@ -6,12 +6,34 @@ Required properties: 
- interrupts: exactly one interrupt specifier



Optional properties:

- pinctrl: When present, must have one state named "sleep"

	   and one state named "default"

- clocks:  When present, must refer to exactly one clock named

- pinctrl: When present, must have one state named "default",

	   and may contain a second name named "sleep". The former

	   state sets up pins for ordinary operation whereas

	   the latter state will put the associated pins to sleep

	   when the UART is unused

- clocks:  When present, the first clock listed must correspond to

	   the clock named UARTCLK on the IP block, i.e. the clock

	   to the external serial line, whereas the second clock

	   must correspond to the PCLK clocking the internal logic

	   of the block. Just listing one clock (the first one) is

	   deprecated.

- clocks-names: When present, the first clock listed must be named

	   "uartclk" and the second clock listed must be named

	   "apb_pclk"

- dmas:	   When present, may have one or two dma channels.

	   The first one must be named "rx", the second one

	   must be named "tx".



See also bindings/arm/primecell.txt



Example:



uart@80120000 {

	compatible = "arm,pl011", "arm,primecell";

	reg = <0x80120000 0x1000>;

	interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;

	dmas = <&dma 13 0 0x2>, <&dma 13 0 0x0>;

	dma-names = "rx", "tx";

	clocks = <&foo_clk>, <&bar_clk>;

	clock-names = "uartclk", "apb_pclk";

};