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Commit a81a3606 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2016-05-11' of git://anongit.freedesktop.org/drm-intel into drm-fixes 

Misc intel fixes, reverting MST audio which was causing oops for now.

* tag 'drm-intel-fixes-2016-05-11' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Bail out of pipe config compute loop on LPT
  Revert "drm/i915: start adding dp mst audio"
  drm/i915/bdw: Add missing delay during L3 SQC credit programming
  drm/i915/lvds: separate border enable readout from panel fitter
  drm/i915: Update CDCLK_FREQ register on BDW after changing cdclk frequency
parents 44549e8f 2700818a

drivers/gpu/drm/i915/i915_debugfs.c

+0 −16
Original line number Original line Diff line number Diff line
@@ -2872,20 +2872,6 @@ static void intel_dp_info(struct seq_file *m, 
		intel_panel_info(m, &intel_connector->panel);

		intel_panel_info(m, &intel_connector->panel);

}

}





static void intel_dp_mst_info(struct seq_file *m,

			  struct intel_connector *intel_connector)

{

	struct intel_encoder *intel_encoder = intel_connector->encoder;

	struct intel_dp_mst_encoder *intel_mst =

		enc_to_mst(&intel_encoder->base);

	struct intel_digital_port *intel_dig_port = intel_mst->primary;

	struct intel_dp *intel_dp = &intel_dig_port->dp;

	bool has_audio = drm_dp_mst_port_has_audio(&intel_dp->mst_mgr,

					intel_connector->port);



	seq_printf(m, "\taudio support: %s\n", yesno(has_audio));

}



static void intel_hdmi_info(struct seq_file *m,

static void intel_hdmi_info(struct seq_file *m,

			    struct intel_connector *intel_connector)

			    struct intel_connector *intel_connector)

{

{
@@ -2929,8 +2915,6 @@ static void intel_connector_info(struct seq_file *m, 
			intel_hdmi_info(m, intel_connector);

			intel_hdmi_info(m, intel_connector);

		else if (intel_encoder->type == INTEL_OUTPUT_LVDS)

		else if (intel_encoder->type == INTEL_OUTPUT_LVDS)

			intel_lvds_info(m, intel_connector);

			intel_lvds_info(m, intel_connector);

		else if (intel_encoder->type == INTEL_OUTPUT_DP_MST)

			intel_dp_mst_info(m, intel_connector);

	}

	}





	seq_printf(m, "\tmodes:\n");

	seq_printf(m, "\tmodes:\n");

drivers/gpu/drm/i915/i915_reg.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -7444,6 +7444,8 @@ enum skl_disp_power_wells { 
#define  TRANS_CLK_SEL_DISABLED		(0x0<<29)

#define  TRANS_CLK_SEL_DISABLED		(0x0<<29)

#define  TRANS_CLK_SEL_PORT(x)		(((x)+1)<<29)

#define  TRANS_CLK_SEL_PORT(x)		(((x)+1)<<29)





#define CDCLK_FREQ			_MMIO(0x46200)



#define _TRANSA_MSA_MISC		0x60410

#define _TRANSA_MSA_MISC		0x60410

#define _TRANSB_MSA_MISC		0x61410

#define _TRANSB_MSA_MISC		0x61410

#define _TRANSC_MSA_MISC		0x62410

#define _TRANSC_MSA_MISC		0x62410

drivers/gpu/drm/i915/intel_audio.c

+3 −6
Original line number Original line Diff line number Diff line
@@ -262,8 +262,7 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder) 
	tmp |= AUD_CONFIG_N_PROG_ENABLE;

	tmp |= AUD_CONFIG_N_PROG_ENABLE;

	tmp &= ~AUD_CONFIG_UPPER_N_MASK;

	tmp &= ~AUD_CONFIG_UPPER_N_MASK;

	tmp &= ~AUD_CONFIG_LOWER_N_MASK;

	tmp &= ~AUD_CONFIG_LOWER_N_MASK;

	if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT) ||

	if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT))

	    intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DP_MST))

		tmp |= AUD_CONFIG_N_VALUE_INDEX;

		tmp |= AUD_CONFIG_N_VALUE_INDEX;

	I915_WRITE(HSW_AUD_CFG(pipe), tmp);

	I915_WRITE(HSW_AUD_CFG(pipe), tmp);
@@ -476,8 +475,7 @@ static void ilk_audio_codec_enable(struct drm_connector *connector, 
	tmp &= ~AUD_CONFIG_N_VALUE_INDEX;

	tmp &= ~AUD_CONFIG_N_VALUE_INDEX;

	tmp &= ~AUD_CONFIG_N_PROG_ENABLE;

	tmp &= ~AUD_CONFIG_N_PROG_ENABLE;

	tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;

	tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;

	if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT) ||

	if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT))

	    intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DP_MST))

		tmp |= AUD_CONFIG_N_VALUE_INDEX;

		tmp |= AUD_CONFIG_N_VALUE_INDEX;

	else

	else

		tmp |= audio_config_hdmi_pixel_clock(adjusted_mode);

		tmp |= audio_config_hdmi_pixel_clock(adjusted_mode);
@@ -515,8 +513,7 @@ void intel_audio_codec_enable(struct intel_encoder *intel_encoder) 




	/* ELD Conn_Type */

	/* ELD Conn_Type */

	connector->eld[5] &= ~(3 << 2);

	connector->eld[5] &= ~(3 << 2);

	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) ||

	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT))

	    intel_pipe_has_type(crtc, INTEL_OUTPUT_DP_MST))

		connector->eld[5] |= (1 << 2);

		connector->eld[5] |= (1 << 2);





	connector->eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;

	connector->eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;

drivers/gpu/drm/i915/intel_crt.c

+7 −1
Original line number Original line Diff line number Diff line
@@ -257,8 +257,14 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder, 
		pipe_config->has_pch_encoder = true;

		pipe_config->has_pch_encoder = true;





	/* LPT FDI RX only supports 8bpc. */

	/* LPT FDI RX only supports 8bpc. */

	if (HAS_PCH_LPT(dev))

	if (HAS_PCH_LPT(dev)) {

		if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) {

			DRM_DEBUG_KMS("LPT only supports 24bpp\n");

			return false;

		}



		pipe_config->pipe_bpp = 24;

		pipe_config->pipe_bpp = 24;

	}





	/* FDI must always be 2.7 GHz */

	/* FDI must always be 2.7 GHz */

	if (HAS_DDI(dev)) {

	if (HAS_DDI(dev)) {

drivers/gpu/drm/i915/intel_ddi.c

+5 −19
Original line number Original line Diff line number Diff line
@@ -3106,23 +3106,6 @@ void intel_ddi_fdi_disable(struct drm_crtc *crtc) 
	I915_WRITE(FDI_RX_CTL(PIPE_A), val);

	I915_WRITE(FDI_RX_CTL(PIPE_A), val);

}

}





bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv,

				 struct intel_crtc *intel_crtc)

{

	u32 temp;



	if (intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_AUDIO)) {

		temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);



		intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO);



		if (temp & AUDIO_OUTPUT_ENABLE(intel_crtc->pipe))

			return true;

	}



	return false;

}



void intel_ddi_get_config(struct intel_encoder *encoder,

void intel_ddi_get_config(struct intel_encoder *encoder,

			  struct intel_crtc_state *pipe_config)

			  struct intel_crtc_state *pipe_config)

{

{
@@ -3183,8 +3166,11 @@ void intel_ddi_get_config(struct intel_encoder *encoder, 
		break;

		break;

	}

	}





	pipe_config->has_audio =

	if (intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_AUDIO)) {

		intel_ddi_is_audio_enabled(dev_priv, intel_crtc);

		temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);

		if (temp & AUDIO_OUTPUT_ENABLE(intel_crtc->pipe))

			pipe_config->has_audio = true;

	}





	if (encoder->type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp_bpp &&

	if (encoder->type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp_bpp &&

	    pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) {

	    pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) {