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Commit a777059a authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Mark Brown
Browse files

spi: Improve DT binding documentation 



  - Add missing verbs and periods,
  - Add spaces before opening parentheses,
  - Align list layout,
  - Correct grammar,
  - Move "cs-gpios" from the required to the optional properties
    section,
  - Remove spaces before tabs.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 1a695a90

Documentation/devicetree/bindings/spi/spi-bus.txt

+18 −17
Original line number Diff line number Diff line
@@ -12,7 +12,6 @@ The SPI master node requires the following properties: 
- #size-cells     - should be zero.

- compatible      - name of SPI bus controller following generic names

		recommended practice.

- cs-gpios	  - (optional) gpios chip select.

No other properties are required in the SPI bus node.  It is assumed

that a driver for an SPI bus device will understand that it is an SPI bus.

However, the binding does not attempt to define the specific method for
@@ -22,11 +21,12 @@ assumption that board specific platform code will be used to manage 
chip selects.  Individual drivers can define additional properties to

support describing the chip select layout.



Optional property:

- num-cs : total number of chipselects

Optional properties:

- cs-gpios	  - gpios chip select.

- num-cs	  - total number of chipselects.



If cs-gpios is used the number of chip select will automatically increased

with max(cs-gpios > hw cs)

If cs-gpios is used the number of chip selects will be increased automatically

with max(cs-gpios > hw cs).



So if for example the controller has 2 CS lines, and the cs-gpios

property looks like this:
@@ -45,27 +45,28 @@ SPI slave nodes must be children of the SPI master node and can 
contain the following properties.

- reg             - (required) chip select address of device.

- compatible      - (required) name of SPI device following generic names

    		recommended practice

- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz

		recommended practice.

- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz.

- spi-cpol        - (optional) Empty property indicating device requires

    		inverse clock polarity (CPOL) mode

		inverse clock polarity (CPOL) mode.

- spi-cpha        - (optional) Empty property indicating device requires

    		shifted clock phase (CPHA) mode

		shifted clock phase (CPHA) mode.

- spi-cs-high     - (optional) Empty property indicating device requires

    		chip select active high

		chip select active high.

- spi-3wire       - (optional) Empty property indicating device requires

		3-wire mode.

- spi-lsb-first   - (optional) Empty property indicating device requires

		LSB first mode.

- spi-tx-bus-width - (optional) The bus width(number of data wires) that

- spi-tx-bus-width - (optional) The bus width (number of data wires) that is

                      used for MOSI. Defaults to 1 if not present.

- spi-rx-bus-width - (optional) The bus width(number of data wires) that

- spi-rx-bus-width - (optional) The bus width (number of data wires) that is

                      used for MISO. Defaults to 1 if not present.

- spi-rx-delay-us  - (optional) Microsecond delay after a read transfer.

- spi-tx-delay-us  - (optional) Microsecond delay after a write transfer.



Some SPI controllers and devices support Dual and Quad SPI transfer mode.

It allows data in the SPI system to be transferred in 2 wires(DUAL) or 4 wires(QUAD).

It allows data in the SPI system to be transferred using 2 wires (DUAL) or 4

wires (QUAD).

Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is

only 1 (SINGLE), 2 (DUAL) and 4 (QUAD).

Dual/Quad mode is not allowed when 3-wire mode is used.