Loading kona-camera-sensor-xrfusion.dtsi +204 −0 Original line number Diff line number Diff line Loading @@ -83,6 +83,210 @@ &cam_sensor_rgb_vio_suspend &cam_sensor_rgb_vdig_suspend>; }; cam_csid_lite2: qcom,csid-lite2@acdd600 { cell-index = <4>; compatible = "qcom,csid-lite480"; reg-names = "csid-lite"; reg = <0xacdd600 0x1000>; reg-cam-base = <0xdd600>; interrupt-names = "csid-lite"; interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_csid_clk_src", "ife_csid_clk", "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_lite_ahb", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <400000000 0 0 0 400000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; cam_vfe_lite2: qcom,ife-lite2@acdd400 { cell-index = <4>; compatible = "qcom,vfe-lite480"; reg-names = "ife-lite"; reg = <0xacdd400 0x2200>; reg-cam-base = <0xdd400>; interrupt-names = "ife-lite"; interrupts = <GIC_SPI 266 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_lite_ahb", "ife_lite_axi", "ife_clk_src", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_AXI_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <0 0 400000000 0>, <0 0 480000000 0>, <0 0 480000000 0>, <0 0 480000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; cam_csid_lite3: qcom,csid-lite3@acdf800 { cell-index = <5>; compatible = "qcom,csid-lite480"; reg-names = "csid-lite"; reg = <0xacdf800 0x1000>; reg-cam-base = <0xdf800>; interrupt-names = "csid-lite"; interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_csid_clk_src", "ife_csid_clk", "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_lite_ahb", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <400000000 0 0 0 400000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; cam_vfe_lite3: qcom,ife-lite3@acdf600 { cell-index = <5>; compatible = "qcom,vfe-lite480"; reg-names = "ife-lite"; reg = <0xacdf600 0x2200>; reg-cam-base = <0xdf600>; interrupt-names = "ife-lite"; interrupts = <GIC_SPI 450 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_lite_ahb", "ife_lite_axi", "ife_clk_src", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_AXI_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <0 0 400000000 0>, <0 0 480000000 0>, <0 0 480000000 0>, <0 0 480000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; cam_csid_lite4: qcom,csid-lite4@ace1a00 { cell-index = <6>; compatible = "qcom,csid-lite480"; reg-names = "csid-lite"; reg = <0xace1a00 0x1000>; reg-cam-base = <0xe1a00>; interrupt-names = "csid-lite"; interrupts = <GIC_SPI 453 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_csid_clk_src", "ife_csid_clk", "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_lite_ahb", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <400000000 0 0 0 400000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; cam_vfe_lite4: qcom,ife-lite4@ace1800 { cell-index = <6>; compatible = "qcom,vfe-lite480"; reg-names = "ife-lite"; reg = <0xace1800 0x2200>; reg-cam-base = <0xe1800>; interrupt-names = "ife-lite"; interrupts = <GIC_SPI 452 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_lite_ahb", "ife_lite_axi", "ife_clk_src", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_AXI_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <0 0 400000000 0>, <0 0 480000000 0>, <0 0 480000000 0>, <0 0 480000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; }; &cam_cci0 { Loading kona-camera.dtsi +71 −24 Original line number Diff line number Diff line Loading @@ -612,11 +612,10 @@ "csiphy0", "csiphy1", "csiphy2", "csiphy3", "csiphy4", "csiphy5", "cci0", "cci1", "csid0", "csid1", "csid2", "csid3", "csid4", "csid5", "csid6", "ife0", "ife1", "ife2", "ife3", "custom0", "ipe0", "cam-cdm-intf0", "cpas-cdm0", "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", "fd0"; "csid4", "csid5", "csid6", "ife0", "ife1", "ife2", "ife3", "ife4", "ife5", "ife6", "custom0", "ipe0", "cam-cdm-intf0", "cpas-cdm0", "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", "fd0"; camera-bus-nodes { level3-nodes { Loading Loading @@ -888,8 +887,40 @@ parent-node = <&level1_rt0_wr1>; }; ife0_rdi_all_rd: ife0-rdi-all-rd { ife4_rdi_all_wr: ife4-rdi-all-wr { cell-index = <22>; node-name = "ife4-rdi-all-wr"; client-name = "ife4"; traffic-data = <CAM_CPAS_PATH_DATA_IFE_RDI_ALL>; traffic-transaction-type = <CAM_CPAS_TRANSACTION_WRITE>; constituent-paths = <CAM_CPAS_PATH_DATA_IFE_RDI0 CAM_CPAS_PATH_DATA_IFE_RDI1 CAM_CPAS_PATH_DATA_IFE_RDI2 CAM_CPAS_PATH_DATA_IFE_RDI3>; parent-node = <&level1_rt0_wr1>; }; ife5_rdi_all_wr: ife5-rdi-all-wr { cell-index = <23>; node-name = "ife5-rdi-all-wr"; client-name = "ife5"; traffic-data = <CAM_CPAS_PATH_DATA_IFE_RDI_ALL>; traffic-transaction-type = <CAM_CPAS_TRANSACTION_WRITE>; constituent-paths = <CAM_CPAS_PATH_DATA_IFE_RDI0 CAM_CPAS_PATH_DATA_IFE_RDI1 CAM_CPAS_PATH_DATA_IFE_RDI2 CAM_CPAS_PATH_DATA_IFE_RDI3>; parent-node = <&level1_rt0_wr1>; }; ife0_rdi_all_rd: ife0-rdi-all-rd { cell-index = <24>; node-name = "ife0-rdi-all-rd"; client-name = "ife0"; traffic-data = Loading @@ -905,7 +936,7 @@ }; ife1_rdi_all_rd: ife1-rdi-all-rd { cell-index = <23>; cell-index = <25>; node-name = "ife1-rdi-all-rd"; client-name = "ife1"; traffic-data = Loading @@ -921,7 +952,7 @@ }; custom0_all_rd: custom0-all-rd { cell-index = <24>; cell-index = <26>; node-name = "custom0-all-rd"; client-name = "custom0"; traffic-data = Loading @@ -932,7 +963,7 @@ }; ife0_rdi_pixel_raw_wr: ife0-rdi-pixel-raw-wr { cell-index = <25>; cell-index = <27>; node-name = "ife0-rdi-pixel-raw-wr"; client-name = "ife0"; traffic-data = Loading @@ -948,7 +979,7 @@ }; ife1_rdi_pixel_raw_wr: ife1-rdi-pixel-raw-wr { cell-index = <26>; cell-index = <28>; node-name = "ife1-rdi-pixel-raw-wr"; client-name = "ife1"; traffic-data = Loading @@ -963,8 +994,24 @@ parent-node = <&level1_rt0_wr2>; }; ife6_rdi_all_wr: ife6-rdi-all-wr { cell-index = <29>; node-name = "ife6-rdi-all-wr"; client-name = "ife6"; traffic-data = <CAM_CPAS_PATH_DATA_IFE_RDI_ALL>; traffic-transaction-type = <CAM_CPAS_TRANSACTION_WRITE>; constituent-paths = <CAM_CPAS_PATH_DATA_IFE_RDI0 CAM_CPAS_PATH_DATA_IFE_RDI1 CAM_CPAS_PATH_DATA_IFE_RDI2 CAM_CPAS_PATH_DATA_IFE_RDI3>; parent-node = <&level1_rt0_wr2>; }; custom0_all_wr: custom0-all-wr { cell-index = <27>; cell-index = <30>; node-name = "custom0-all-wr"; client-name = "custom0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -974,7 +1021,7 @@ }; ipe0_all_wr: ipe0-all-wr { cell-index = <28>; cell-index = <31>; node-name = "ipe0-all-wr"; client-name = "ipe0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -988,7 +1035,7 @@ }; bps0_all_wr: bps0-all-wr { cell-index = <29>; cell-index = <32>; node-name = "bps0-all-wr"; client-name = "bps0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -998,7 +1045,7 @@ }; ipe0_ref_rd: ipe0-ref-rd { cell-index = <30>; cell-index = <33>; node-name = "ipe0-ref-rd"; client-name = "ipe0"; traffic-data = Loading @@ -1009,7 +1056,7 @@ }; bps0_all_rd: bps0-all-rd { cell-index = <31>; cell-index = <34>; node-name = "bps0-all-rd"; client-name = "bps0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1019,7 +1066,7 @@ }; ipe0_in_rd: ipe0-in-rd { cell-index = <32>; cell-index = <35>; node-name = "ipe0-in-rd"; client-name = "ipe0"; traffic-data = Loading @@ -1030,7 +1077,7 @@ }; jpeg_enc0_all_wr: jpeg-enc0-all-wr { cell-index = <33>; cell-index = <36>; node-name = "jpeg-enc0-all-wr"; client-name = "jpeg-enc0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1040,7 +1087,7 @@ }; jpeg_dma0_all_wr: jpeg-dma0-all-wr { cell-index = <34>; cell-index = <37>; node-name = "jpeg-dma0-all-wr"; client-name = "jpeg-dma0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1050,7 +1097,7 @@ }; jpeg_enc0_all_rd: jpeg-enc0-all-rd { cell-index = <35>; cell-index = <38>; node-name = "jpeg-enc0-all-rd"; client-name = "jpeg-enc0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1060,7 +1107,7 @@ }; jpeg_dma0_all_rd: jpeg-dma0-all-rd { cell-index = <36>; cell-index = <39>; node-name = "jpeg-dma0-all-rd"; client-name = "jpeg-dma0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1070,7 +1117,7 @@ }; fd0_all_wr: fd0-all-wr { cell-index = <37>; cell-index = <40>; node-name = "fd0-all-wr"; client-name = "fd0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1080,7 +1127,7 @@ }; fd0_all_rd: fd0-all-rd { cell-index = <38>; cell-index = <41>; node-name = "fd0-all-rd"; client-name = "fd0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1090,7 +1137,7 @@ }; cpas_cdm0_all_rd: cpas-cdm0-all-rd { cell-index = <39>; cell-index = <42>; node-name = "cpas-cdm0-all-rd"; client-name = "cpas-cdm0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1100,7 +1147,7 @@ }; icp0_all_rd: icp0-all-rd { cell-index = <40>; cell-index = <43>; node-name = "icp0-all-rd"; client-name = "icp0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading Loading
kona-camera-sensor-xrfusion.dtsi +204 −0 Original line number Diff line number Diff line Loading @@ -83,6 +83,210 @@ &cam_sensor_rgb_vio_suspend &cam_sensor_rgb_vdig_suspend>; }; cam_csid_lite2: qcom,csid-lite2@acdd600 { cell-index = <4>; compatible = "qcom,csid-lite480"; reg-names = "csid-lite"; reg = <0xacdd600 0x1000>; reg-cam-base = <0xdd600>; interrupt-names = "csid-lite"; interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_csid_clk_src", "ife_csid_clk", "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_lite_ahb", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <400000000 0 0 0 400000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; cam_vfe_lite2: qcom,ife-lite2@acdd400 { cell-index = <4>; compatible = "qcom,vfe-lite480"; reg-names = "ife-lite"; reg = <0xacdd400 0x2200>; reg-cam-base = <0xdd400>; interrupt-names = "ife-lite"; interrupts = <GIC_SPI 266 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_lite_ahb", "ife_lite_axi", "ife_clk_src", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_AXI_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <0 0 400000000 0>, <0 0 480000000 0>, <0 0 480000000 0>, <0 0 480000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; cam_csid_lite3: qcom,csid-lite3@acdf800 { cell-index = <5>; compatible = "qcom,csid-lite480"; reg-names = "csid-lite"; reg = <0xacdf800 0x1000>; reg-cam-base = <0xdf800>; interrupt-names = "csid-lite"; interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_csid_clk_src", "ife_csid_clk", "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_lite_ahb", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <400000000 0 0 0 400000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; cam_vfe_lite3: qcom,ife-lite3@acdf600 { cell-index = <5>; compatible = "qcom,vfe-lite480"; reg-names = "ife-lite"; reg = <0xacdf600 0x2200>; reg-cam-base = <0xdf600>; interrupt-names = "ife-lite"; interrupts = <GIC_SPI 450 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_lite_ahb", "ife_lite_axi", "ife_clk_src", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_AXI_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <0 0 400000000 0>, <0 0 480000000 0>, <0 0 480000000 0>, <0 0 480000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; cam_csid_lite4: qcom,csid-lite4@ace1a00 { cell-index = <6>; compatible = "qcom,csid-lite480"; reg-names = "csid-lite"; reg = <0xace1a00 0x1000>; reg-cam-base = <0xe1a00>; interrupt-names = "csid-lite"; interrupts = <GIC_SPI 453 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_csid_clk_src", "ife_csid_clk", "cphy_rx_clk_src", "ife_cphy_rx_clk", "ife_clk_src", "ife_lite_ahb", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <400000000 0 0 0 400000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>, <400000000 0 0 0 480000000 0 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_csid_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; cam_vfe_lite4: qcom,ife-lite4@ace1800 { cell-index = <6>; compatible = "qcom,vfe-lite480"; reg-names = "ife-lite"; reg = <0xace1800 0x2200>; reg-cam-base = <0xe1800>; interrupt-names = "ife-lite"; interrupts = <GIC_SPI 452 IRQ_TYPE_EDGE_RISING>; regulator-names = "camss"; camss-supply = <&titan_top_gdsc>; clock-names = "ife_lite_ahb", "ife_lite_axi", "ife_clk_src", "ife_clk"; clocks = <&clock_camcc CAM_CC_IFE_LITE_AHB_CLK>, <&clock_camcc CAM_CC_IFE_LITE_AXI_CLK>, <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>, <&clock_camcc CAM_CC_IFE_LITE_CLK>; clock-rates = <0 0 400000000 0>, <0 0 480000000 0>, <0 0 480000000 0>, <0 0 480000000 0>; clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo"; src-clock-name = "ife_clk_src"; clock-control-debugfs = "true"; status = "ok"; }; }; &cam_cci0 { Loading
kona-camera.dtsi +71 −24 Original line number Diff line number Diff line Loading @@ -612,11 +612,10 @@ "csiphy0", "csiphy1", "csiphy2", "csiphy3", "csiphy4", "csiphy5", "cci0", "cci1", "csid0", "csid1", "csid2", "csid3", "csid4", "csid5", "csid6", "ife0", "ife1", "ife2", "ife3", "custom0", "ipe0", "cam-cdm-intf0", "cpas-cdm0", "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", "fd0"; "csid4", "csid5", "csid6", "ife0", "ife1", "ife2", "ife3", "ife4", "ife5", "ife6", "custom0", "ipe0", "cam-cdm-intf0", "cpas-cdm0", "bps0", "icp0", "jpeg-dma0", "jpeg-enc0", "fd0"; camera-bus-nodes { level3-nodes { Loading Loading @@ -888,8 +887,40 @@ parent-node = <&level1_rt0_wr1>; }; ife0_rdi_all_rd: ife0-rdi-all-rd { ife4_rdi_all_wr: ife4-rdi-all-wr { cell-index = <22>; node-name = "ife4-rdi-all-wr"; client-name = "ife4"; traffic-data = <CAM_CPAS_PATH_DATA_IFE_RDI_ALL>; traffic-transaction-type = <CAM_CPAS_TRANSACTION_WRITE>; constituent-paths = <CAM_CPAS_PATH_DATA_IFE_RDI0 CAM_CPAS_PATH_DATA_IFE_RDI1 CAM_CPAS_PATH_DATA_IFE_RDI2 CAM_CPAS_PATH_DATA_IFE_RDI3>; parent-node = <&level1_rt0_wr1>; }; ife5_rdi_all_wr: ife5-rdi-all-wr { cell-index = <23>; node-name = "ife5-rdi-all-wr"; client-name = "ife5"; traffic-data = <CAM_CPAS_PATH_DATA_IFE_RDI_ALL>; traffic-transaction-type = <CAM_CPAS_TRANSACTION_WRITE>; constituent-paths = <CAM_CPAS_PATH_DATA_IFE_RDI0 CAM_CPAS_PATH_DATA_IFE_RDI1 CAM_CPAS_PATH_DATA_IFE_RDI2 CAM_CPAS_PATH_DATA_IFE_RDI3>; parent-node = <&level1_rt0_wr1>; }; ife0_rdi_all_rd: ife0-rdi-all-rd { cell-index = <24>; node-name = "ife0-rdi-all-rd"; client-name = "ife0"; traffic-data = Loading @@ -905,7 +936,7 @@ }; ife1_rdi_all_rd: ife1-rdi-all-rd { cell-index = <23>; cell-index = <25>; node-name = "ife1-rdi-all-rd"; client-name = "ife1"; traffic-data = Loading @@ -921,7 +952,7 @@ }; custom0_all_rd: custom0-all-rd { cell-index = <24>; cell-index = <26>; node-name = "custom0-all-rd"; client-name = "custom0"; traffic-data = Loading @@ -932,7 +963,7 @@ }; ife0_rdi_pixel_raw_wr: ife0-rdi-pixel-raw-wr { cell-index = <25>; cell-index = <27>; node-name = "ife0-rdi-pixel-raw-wr"; client-name = "ife0"; traffic-data = Loading @@ -948,7 +979,7 @@ }; ife1_rdi_pixel_raw_wr: ife1-rdi-pixel-raw-wr { cell-index = <26>; cell-index = <28>; node-name = "ife1-rdi-pixel-raw-wr"; client-name = "ife1"; traffic-data = Loading @@ -963,8 +994,24 @@ parent-node = <&level1_rt0_wr2>; }; ife6_rdi_all_wr: ife6-rdi-all-wr { cell-index = <29>; node-name = "ife6-rdi-all-wr"; client-name = "ife6"; traffic-data = <CAM_CPAS_PATH_DATA_IFE_RDI_ALL>; traffic-transaction-type = <CAM_CPAS_TRANSACTION_WRITE>; constituent-paths = <CAM_CPAS_PATH_DATA_IFE_RDI0 CAM_CPAS_PATH_DATA_IFE_RDI1 CAM_CPAS_PATH_DATA_IFE_RDI2 CAM_CPAS_PATH_DATA_IFE_RDI3>; parent-node = <&level1_rt0_wr2>; }; custom0_all_wr: custom0-all-wr { cell-index = <27>; cell-index = <30>; node-name = "custom0-all-wr"; client-name = "custom0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -974,7 +1021,7 @@ }; ipe0_all_wr: ipe0-all-wr { cell-index = <28>; cell-index = <31>; node-name = "ipe0-all-wr"; client-name = "ipe0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -988,7 +1035,7 @@ }; bps0_all_wr: bps0-all-wr { cell-index = <29>; cell-index = <32>; node-name = "bps0-all-wr"; client-name = "bps0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -998,7 +1045,7 @@ }; ipe0_ref_rd: ipe0-ref-rd { cell-index = <30>; cell-index = <33>; node-name = "ipe0-ref-rd"; client-name = "ipe0"; traffic-data = Loading @@ -1009,7 +1056,7 @@ }; bps0_all_rd: bps0-all-rd { cell-index = <31>; cell-index = <34>; node-name = "bps0-all-rd"; client-name = "bps0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1019,7 +1066,7 @@ }; ipe0_in_rd: ipe0-in-rd { cell-index = <32>; cell-index = <35>; node-name = "ipe0-in-rd"; client-name = "ipe0"; traffic-data = Loading @@ -1030,7 +1077,7 @@ }; jpeg_enc0_all_wr: jpeg-enc0-all-wr { cell-index = <33>; cell-index = <36>; node-name = "jpeg-enc0-all-wr"; client-name = "jpeg-enc0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1040,7 +1087,7 @@ }; jpeg_dma0_all_wr: jpeg-dma0-all-wr { cell-index = <34>; cell-index = <37>; node-name = "jpeg-dma0-all-wr"; client-name = "jpeg-dma0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1050,7 +1097,7 @@ }; jpeg_enc0_all_rd: jpeg-enc0-all-rd { cell-index = <35>; cell-index = <38>; node-name = "jpeg-enc0-all-rd"; client-name = "jpeg-enc0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1060,7 +1107,7 @@ }; jpeg_dma0_all_rd: jpeg-dma0-all-rd { cell-index = <36>; cell-index = <39>; node-name = "jpeg-dma0-all-rd"; client-name = "jpeg-dma0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1070,7 +1117,7 @@ }; fd0_all_wr: fd0-all-wr { cell-index = <37>; cell-index = <40>; node-name = "fd0-all-wr"; client-name = "fd0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1080,7 +1127,7 @@ }; fd0_all_rd: fd0-all-rd { cell-index = <38>; cell-index = <41>; node-name = "fd0-all-rd"; client-name = "fd0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1090,7 +1137,7 @@ }; cpas_cdm0_all_rd: cpas-cdm0-all-rd { cell-index = <39>; cell-index = <42>; node-name = "cpas-cdm0-all-rd"; client-name = "cpas-cdm0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading @@ -1100,7 +1147,7 @@ }; icp0_all_rd: icp0-all-rd { cell-index = <40>; cell-index = <43>; node-name = "icp0-all-rd"; client-name = "icp0"; traffic-data = <CAM_CPAS_PATH_DATA_ALL>; Loading